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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-06 11:59:46 +02:00
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itsaflower-patch-2
yosys/backends/verilog
T
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Janeczko Jakub d840a852a9 Fix typo in comment about address collision pattern
2026-08-04 06:44:05 +02:00
..
CMakeLists.txt
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
verilog_backend.cc
Fix typo in comment about address collision pattern
2026-08-04 06:44:05 +02:00
verilog_backend.h
verilog backend: runtime optimization for keyword pool
2026-05-29 17:53:31 +00:00
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