Add "whitebox" attribute, add "read_verilog -wb"

Signed-off-by: Clifford Wolf <[email protected]>
This commit is contained in:
Clifford Wolf
2019-04-18 17:45:47 +02:00
parent ea8ac0aaad
commit f4abc21d8a
23 changed files with 81 additions and 42 deletions
+1 -1
View File
@@ -212,7 +212,7 @@ struct SpiceBackend : public Backend {
for (auto module_it : design->modules_)
{
RTLIL::Module *module = module_it.second;
if (module->get_bool_attribute("\\blackbox"))
if (module->get_blackbox_attribute())
continue;
if (module->processes.size() != 0)