mirror of
https://github.com/YosysHQ/yosys.git
synced 2026-08-22 14:17:27 +02:00
Add "whitebox" attribute, add "read_verilog -wb"
Signed-off-by: Clifford Wolf <[email protected]>
This commit is contained in:
@@ -212,7 +212,7 @@ struct SpiceBackend : public Backend {
|
||||
for (auto module_it : design->modules_)
|
||||
{
|
||||
RTLIL::Module *module = module_it.second;
|
||||
if (module->get_bool_attribute("\\blackbox"))
|
||||
if (module->get_blackbox_attribute())
|
||||
continue;
|
||||
|
||||
if (module->processes.size() != 0)
|
||||
|
||||
Reference in New Issue
Block a user