luke
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

techmap: decode derived_name in the map pool, not the target design 

derived_name and the template's marker wire are interned in map->twines;
decoding them with design->twines read an out-of-range/foreign pool slot
(garbage, or a crash once pool sizes diverge) in the _TECHMAP_FAIL_ log.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This commit is contained in:
Emil J. Tywoniak 2026-06-24 17:39:13 +02:00
parent 3c0056a4c1
commit d5c1875055
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
passes/techmap/techmap.cc
View File

@ -798,7 +798,7 @@ struct TechmapWorker
RTLIL::SigSpec value = elem.value; RTLIL::SigSpec value = elem.value;
if (value.is_fully_const() && value.as_bool()) { if (value.is_fully_const() && value.as_bool()) {
log("Not using module `%s' from techmap as it contains a %s marker wire with non-zero value %s.\n", log("Not using module `%s' from techmap as it contains a %s marker wire with non-zero value %s.\n",
design->twines.unescaped_str(derived_name).data(), design->twines.unescaped_str(elem.wire->name.ref()).data(), log_signal(value)); map->twines.unescaped_str(derived_name).data(), map->twines.unescaped_str(elem.wire->name.ref()).data(), log_signal(value));
techmap_do_cache[tpl] = false; techmap_do_cache[tpl] = false;
} }
} }