Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs

2026-08-22 14:17:27 +02:00 · 2017-04-05 23:01:29 -05:00
parent fcb274a564
commit c27dcc1e47
25 changed files with 2255 additions and 0 deletions
@@ -0,0 +1,5 @@
+#!/bin/bash
+
+iverilog -D POST_IMPL -o verif_post -s tb_top tb_top.v top.vqm $(yosys-config --datdir/altera_intel/max10/cells_comb_max10.v)
+vvp -N verif_post
+