luke/yosys
1
0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-22 14:17:27 +02:00
Code Issues Packages Projects Releases Wiki Activity

Improve Verific SVA importer

Browse Source
This commit is contained in:
Clifford Wolf
2017-07-27 14:05:09 +02:00
parent 877ff1f75e
commit c1cfca8f54
2 changed files with 42 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
tests/sva/counter.sv
+8 -7
View File
@@ -11,19 +11,20 @@ module top (input clk, reset, up, down, output reg [7:0] cnt);
default clocking @(posedge clk); endclocking
default disable iff (reset);
assert property (up |=> cnt == $past(cnt) + 8'd1);
// assert property (up [*2] |=> cnt == $past(cnt, 2) + 8'd2);
// assert property (up ##1 up |=> cnt == $past(cnt, 2) + 8'd2);
assert property (up |=> cnt == $past(cnt) + 8'd 1);
assert property (up [*2] |=> cnt == $past(cnt, 2) + 8'd 2);
assert property (up ##1 up |=> cnt == $past(cnt, 2) + 8'd 2);
`ifndef FAIL
assume property (down |-> !up);
`endif
assert property (down |=> cnt == $past(cnt) - 8'd1);
assert property (up ##1 down |=> cnt == $past(cnt, 2));
assert property (down |=> cnt == $past(cnt) - 8'd 1);
property down_n(n);
down [*n] |=> cnt == $past(cnt, n) + n;
down [*n] |=> cnt == $past(cnt, n) - n;
endproperty
// assert property (down_n(3));
// assert property (down_n(5));
assert property (down_n(8'd 3));
assert property (down_n(8'd 5));
endmodule