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functional backend: require shift width == clog2(operand width)

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Emily Schmidt
2024-08-21 11:03:29 +01:00
parent 7f8f21b980
commit c0c90c2c31
3 changed files with 34 additions and 29 deletions
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tests/functional/rtlil_cells.py
+4 -1
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@@ -206,7 +206,10 @@ shift_widths = [
(32, 32, 64, True, True),
(32, 32, 64, False, True),
# at least one test where the result is going to be truncated
(32, 6, 16, False, False)
(32, 6, 16, False, False),
# since 1-bit shifts are special cased
(1, 4, 1, False, False),
(1, 4, 1, True, False),
]
rtlil_cells = [