mirror of https://github.com/YosysHQ/yosys.git
No operator optimization, but it passes all tests
This commit is contained in:
parent
0ee2277d4f
commit
bf40364bd0
24
Makefile
24
Makefile
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@ -558,6 +558,7 @@ ifeq ($(ENABLE_VERIFIC_SILIMATE_EXTENSIONS),1)
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CXXFLAGS += -DSILIMATE_VERIFIC_EXTENSIONS
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VERIFIC_SILIMATE_OBJS += $(VERIFIC_DIR)/database/DBSilimate.o
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VERIFIC_SILIMATE_OBJS += $(VERIFIC_DIR)/verilog/VeriSilimate.o
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VERIFIC_SILIMATE_OBJS += $(VERIFIC_DIR)/util/UtilSilimate.o
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endif
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ifeq ($(ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS),1)
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VERIFIC_COMPONENTS += extensions
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@ -591,6 +592,9 @@ $(VERIFIC_DIR)/database/DBSilimate.o: $(VERIFIC_DIR)/database/DBSilimate.cpp
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$(VERIFIC_DIR)/verilog/VeriSilimate.o: $(VERIFIC_DIR)/verilog/VeriSilimate.cpp
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$(P) $(CXX) -o $@ $(CPPFLAGS) $(CXXFLAGS) -c $<
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$(VERIFIC_DIR)/util/UtilSilimate.o: $(VERIFIC_DIR)/util/UtilSilimate.cpp
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$(P) $(CXX) -o $@ $(CPPFLAGS) $(CXXFLAGS) -c $<
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ifeq ($(OS), Darwin)
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VERIFIC_LIB_OS_SUFFIX = mac
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@ -621,6 +625,18 @@ $(VERIFIC_DIR)/verilog/verilog-mac.a: $(VERIFIC_DIR)/verilog/verilog-mac.raw.a $
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$(Q) ar rcs $@ $@_patch_tmp/*.o
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$(Q) rm -rf $@_patch_tmp
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$(VERIFIC_DIR)/util/util-mac.a: $(VERIFIC_DIR)/util/util-mac.raw.a $(VERIFIC_DIR)/_override_syms.txt
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$(Q) cp $< $@
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$(Q) mkdir -p $@_patch_tmp
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$(Q) cd $@_patch_tmp && ar x $(CURDIR)/$@ && \
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for o in *.o; do \
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nm -gjU "$$o" 2>/dev/null | grep -Fx -f $(CURDIR)/$(VERIFIC_DIR)/_override_syms.txt > "$$o.syms" 2>/dev/null; \
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if [ -s "$$o.syms" ]; then nmedit -R "$$o.syms" "$$o"; fi; \
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rm -f "$$o.syms"; \
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done
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$(Q) ar rcs $@ $@_patch_tmp/*.o
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$(Q) rm -rf $@_patch_tmp
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else
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VERIFIC_LIB_OS_SUFFIX = linux
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LINKFLAGS += -Wl,--allow-multiple-definition
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@ -631,9 +647,15 @@ $(VERIFIC_DIR)/database/database-linux.a: $(VERIFIC_DIR)/database/database-linux
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$(VERIFIC_DIR)/verilog/verilog-linux.a: $(VERIFIC_DIR)/verilog/verilog-linux.raw.a
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$(Q) cp $< $@
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$(VERIFIC_DIR)/util/util-linux.a: $(VERIFIC_DIR)/util/util-linux.raw.a
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$(Q) cp $< $@
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endif
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VERIFIC_PATCHED_ARCHIVES = $(VERIFIC_DIR)/database/database-$(VERIFIC_LIB_OS_SUFFIX).a $(VERIFIC_DIR)/verilog/verilog-$(VERIFIC_LIB_OS_SUFFIX).a
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VERIFIC_PATCHED_ARCHIVES = \
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$(VERIFIC_DIR)/database/database-$(VERIFIC_LIB_OS_SUFFIX).a \
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$(VERIFIC_DIR)/verilog/verilog-$(VERIFIC_LIB_OS_SUFFIX).a \
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$(VERIFIC_DIR)/util/util-$(VERIFIC_LIB_OS_SUFFIX).a
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endif # ENABLE_VERIFIC_SILIMATE_EXTENSIONS
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@ -3223,9 +3223,6 @@ std::string verific_import(Design *design, const std::map<std::string,std::strin
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log(" Running post-elaboration for %s.\n", it->first.c_str());
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nl->PostElaborationProcess();
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log(" Running operator optimization for %s.\n", it->first.c_str());
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nl->OperatorOptimization();
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}
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if (nl_done.count(it->first) == 0) {
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@ -92,7 +92,7 @@ generate_tests() {
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if [[ $do_sv = true ]]; then
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for x in *.sv; do
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if [ ! -f "${x%.sv}.ys" ]; then
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generate_ys_test "$x" "-p \"prep -top top; async2sync; select top; sat -enable_undef -verify -prove-asserts\" $yosys_args"
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generate_ys_test "$x" "-p \"prep -top top; async2sync; sat -enable_undef -verify -prove-asserts\" $yosys_args"
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fi;
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done
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fi;
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@ -2,8 +2,6 @@
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## Disabled
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<!-- - `import_warning_operator`: no VHDL -->
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<!-- - `mixed_flist`: no VHDL -->
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- `memory_semantics`: relies on initial values being retained, which we do not want
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- `rom_case`: we need different behavior for multi-port memories
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- `blackbox*`: we need different behavior for parametrized blackboxes
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2
verific
2
verific
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@ -1 +1 @@
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Subproject commit fc343c9904855352fd8294bcd7209afcfca9bbbc
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Subproject commit 9280b31043881bbbc50bfedc74902b1f6debe81d
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