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Do not $mul -> $__mul if A and B are less than maxwidth
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@@ -28,7 +28,9 @@ module \$mul (A, B, Y);
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output [Y_WIDTH-1:0] Y;
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generate
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if (A_SIGNED != B_SIGNED || A_WIDTH <= 1 || B_WIDTH <= 1)
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if (A_SIGNED != B_SIGNED)
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wire _TECHMAP_FAIL_ = 1;
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else if (A_WIDTH <= `DSP_A_MAXWIDTH && B_WIDTH <= `DSP_B_MAXWIDTH)
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wire _TECHMAP_FAIL_ = 1;
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// NB: A_SIGNED == B_SIGNED == 0 from here
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else if (A_WIDTH >= B_WIDTH)
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