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opt_expr: use patcher for xor constant folding

This commit is contained in:
Emil J. Tywoniak 2026-05-26 12:27:09 +02:00
parent 688d256edc
commit b3a33aeeba
1 changed files with 15 additions and 8 deletions
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23
passes/opt/opt_expr.cc
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@ -23,6 +23,7 @@
#include "kernel/newcelltypes.h" #include "kernel/newcelltypes.h"
#include "kernel/utils.h" #include "kernel/utils.h"
#include "kernel/log.h" #include "kernel/log.h"
#include "kernel/unstable/patch.h"
#include <stdlib.h> #include <stdlib.h>
#include <stdio.h> #include <stdio.h>
#include <algorithm> #include <algorithm>
@ -617,17 +618,23 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
log_abort(); log_abort();
} }
if (!sig_a.wire) auto port_a = ID::A;
if (!sig_a.wire) {
std::swap(sig_a, sig_b); std::swap(sig_a, sig_b);
port_a = ID::B;
}
if (sig_b == State::S0 || sig_b == State::S1) { if (sig_b == State::S0 || sig_b == State::S1) {
if (cell->type.in(ID($xor), ID($_XOR_))) { if (cell->type.in(ID($xor), ID($_XOR_))) {
SigSpec sig_y; if (sig_b == State::S0) {
if (cell->type == ID($xor)) replace_cell(assign_map, module, cell, "xor_buffer", ID::Y, sig_a);
sig_y = (sig_b == State::S1 ? module->Not(NEW_ID, sig_a).as_bit() : sig_a); } else {
else if (cell->type == ID($_XOR_)) RTLIL::Patch patcher;
sig_y = (sig_b == State::S1 ? module->NotGate(NEW_ID, sig_a) : sig_a); patcher.mod = module;
else log_abort(); Wire* y = patcher.addWire(NEW_ID, cell->type == ID($xor) ? cell->getParam(ID::Y_WIDTH).as_int() : 1);
replace_cell(assign_map, module, cell, "xor_buffer", ID::Y, sig_y); Cell* new_cell = cell->type == ID($xor) ? patcher.addNot(NEW_ID, sig_a, y) : patcher.addNotGate(NEW_ID, sig_a, y);
patcher.leaves = {cell->getPort(port_a).as_wire()};
patcher.patch(cell, new_cell);
}
goto next_cell; goto next_cell;
} }
if (cell->type.in(ID($xnor), ID($_XNOR_))) { if (cell->type.in(ID($xnor), ID($_XNOR_))) {