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Cleanup for abcopt-tests

This commit is contained in:
Miodrag Milanovic 2026-03-10 11:18:05 +01:00
parent 169b9994dc
commit a155994868
2 changed files with 7 additions and 7 deletions
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2
tests/Makefile
View File

@ -79,7 +79,7 @@ seed-./%: %/run-test.sh
.PHONY: abcopt-tests .PHONY: abcopt-tests
abcopt-tests: $(SH_ABC_TEST_DIRS:%=abcopt-./%) abcopt-tests: $(SH_ABC_TEST_DIRS:%=abcopt-./%)
abcopt-./%: %/run-test.sh abcopt-./%: %/run-test.sh
+cd $* && bash run-test.sh $(ABCOPT) $(SEEDOPT) >/dev/null 2>&1 +cd $* && bash run-test.sh $(ABCOPT) $(SEEDOPT)
+@echo "...passed tests in $*" +@echo "...passed tests in $*"
# makefile-./ is a dummy string, not a directory # makefile-./ is a dummy string, not a directory

12
tests/aiger/run-test.sh
View File

@ -22,7 +22,7 @@ for aag in *.aag; do
# (which would have been created by the reference aig2aig utility, # (which would have been created by the reference aig2aig utility,
# available from http://fmv.jku.at/aiger/) # available from http://fmv.jku.at/aiger/)
echo "Checking $aag." echo "Checking $aag."
$abcprog -q "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v" $abcprog -q "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v" >/dev/null 2>&1
../../yosys -qp " ../../yosys -qp "
read_verilog ${aag%.*}_ref.v read_verilog ${aag%.*}_ref.v
prep prep
@ -34,12 +34,12 @@ design -import gold -as gold
design -import gate -as gate design -import gate -as gate
miter -equiv -flatten -make_assert -make_outputs gold gate miter miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -show-ports -seq 16 miter sat -verify -prove-asserts -show-ports -seq 16 miter
" -l ${aag}.log " -l ${aag}.log >/dev/null 2>&1
done done
for aig in *.aig; do for aig in *.aig; do
echo "Checking $aig." echo "Checking $aig."
$abcprog -q "read -c $aig; write ${aig%.*}_ref.v" $abcprog -q "read -c $aig; write ${aig%.*}_ref.v" >/dev/null 2>&1
../../yosys -qp " ../../yosys -qp "
read_verilog ${aig%.*}_ref.v read_verilog ${aig%.*}_ref.v
prep prep
@ -51,18 +51,18 @@ design -import gold -as gold
design -import gate -as gate design -import gate -as gate
miter -equiv -flatten -make_assert -make_outputs gold gate miter miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -show-ports -seq 16 miter sat -verify -prove-asserts -show-ports -seq 16 miter
" -l ${aig}.log " -l ${aig}.log >/dev/null 2>&1
done done
for y in *.ys; do for y in *.ys; do
echo "Running $y." echo "Running $y."
../../yosys -ql ${y%.*}.log $y ../../yosys -ql ${y%.*}.log $y >/dev/null 2>&1
done done
# compare aigmap with reference # compare aigmap with reference
# make gold with: rm gold/*; yosys --no-version -p "test_cell -aigmap -w gold/ -n 1 -s 1 all" # make gold with: rm gold/*; yosys --no-version -p "test_cell -aigmap -w gold/ -n 1 -s 1 all"
rm -rf gate; mkdir gate rm -rf gate; mkdir gate
../../yosys --no-version -p "test_cell -aigmap -w gate/ -n 1 -s 1 all" ../../yosys --no-version -p "test_cell -aigmap -w gate/ -n 1 -s 1 all" >/dev/null 2>&1
( (
set -o pipefail set -o pipefail
diff --brief gold gate | tee aigmap.err diff --brief gold gate | tee aigmap.err