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Revert veri_break_loops setting

This commit is contained in:
Akash Levy 2024-06-07 00:09:01 -07:00
parent 5cc35131a8
commit 8499d31cf2
1 changed files with 1 additions and 1 deletions
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2
frontends/verific/verific.cc
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@ -3252,7 +3252,7 @@ struct VerificPass : public Pass {
RuntimeFlags::SetVar("veri_extract_dualport_rams", 0);
RuntimeFlags::SetVar("veri_extract_multiport_rams", 1);
RuntimeFlags::SetVar("veri_allow_any_ram_in_loop", 1);
RuntimeFlags::SetVar("veri_break_loops", 0); // SILIMATE: add to avoid breaking loops
// RuntimeFlags::SetVar("veri_break_loops", 0); // SILIMATE: add to avoid breaking loops
// RuntimeFlags::SetVar("veri_optimize_wide_selector", 1); // SILIMATE: add to optimize wide selector (FIXME: check if this is ok)
RuntimeFlags::SetVar("veri_ignore_assertion_statements", 1); // SILIMATE: add to ignore SVA/asserts