mirror of https://github.com/YosysHQ/yosys.git
tests/opt: Add extra alumacc test
Checks equivalence when folding an `$lt` (or equivalently a `$gt`) into a `$sub`. Currently failing, fix incoming.
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@ -31,3 +31,15 @@ proc
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equiv_opt -assert alumacc
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alumacc
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select -assert-count 1 t:$alu
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design -reset
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read_verilog << EOT
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module top(input signed a, b, output x, output [1:0] y);
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assign y = $unsigned(a) - $unsigned(b);
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assign x = a > b;
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endmodule
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EOT
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hierarchy
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wreduce
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equiv_opt -assert alumacc
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