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Fixes for some of clang scan-build detected issues
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@@ -302,7 +302,7 @@ void proc_dff(RTLIL::Module *mod, RTLIL::Process *proc, ConstEval &ce)
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ce.assign_map.apply(rstval);
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ce.assign_map.apply(sig);
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if (rstval == sig) {
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if (rstval == sig && sync_level) {
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if (sync_level->type == RTLIL::SyncType::ST1)
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insig = mod->Mux(NEW_ID, insig, sig, sync_level->signal);
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else
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