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Merge pull request #5361 from YosysHQ/emil/simplemap-transfer-src

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simplemap: fix src attribute transfer
This commit is contained in:
Emil J
2025-09-23 20:40:57 +02:00
committed by GitHub
parent a316b8f90c 6527cc2134
commit 5f6819fd76
2 changed files with 30 additions and 18 deletions
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tests/arch/gowin/mux.ys
+2 -2
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@@ -32,8 +32,8 @@ proc
equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux8 # Constrain all select calls below inside the top module
select -assert-count 1 t:LUT1
select -assert-count 10 t:LUT3
select -assert-count 3 t:LUT1
select -assert-count 2 t:LUT3
select -assert-count 1 t:LUT4
select -assert-count 5 t:MUX2_LUT5
select -assert-count 2 t:MUX2_LUT6