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gowin: wire output clock enable ports to enable inputs, not constants

This commit is contained in:
Emil J. Tywoniak 2026-03-11 20:38:52 +01:00
parent 4716f4410f
commit 5f4be8c0a8
1 changed files with 4 additions and 4 deletions
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8
techlibs/gowin/brams_map.v
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@ -239,7 +239,7 @@ if (PORT_A_WIDTH < 9 || PORT_B_WIDTH < 9) begin
.CEA(PORT_A_CLK_EN),
.WREA(PORT_A_WR_EN),
.RESETA(RSTA),
.OCEA(1'b1),
.OCEA(PORT_A_CLK_EN),
.ADA(ADA),
.DIA(DIA),
.DOA(DOA),
@ -248,7 +248,7 @@ if (PORT_A_WIDTH < 9 || PORT_B_WIDTH < 9) begin
.CEB(PORT_B_CLK_EN),
.WREB(PORT_B_WR_EN),
.RESETB(RSTB),
.OCEB(1'b1),
.OCEB(PORT_B_CLK_EN),
.ADB(ADB),
.DIB(DIB),
.DOB(DOB),
@ -283,7 +283,7 @@ end else begin
.CEA(PORT_A_CLK_EN),
.WREA(PORT_A_WR_EN),
.RESETA(RSTA),
.OCEA(1'b1),
.OCEA(PORT_A_CLK_EN),
.ADA(ADA),
.DIA(DIA),
.DOA(DOA),
@ -292,7 +292,7 @@ end else begin
.CEB(PORT_B_CLK_EN),
.WREB(PORT_B_WR_EN),
.RESETB(RSTB),
.OCEB(1'b1),
.OCEB(PORT_B_CLK_EN),
.ADB(ADB),
.DIB(DIB),
.DOB(DOB),