Add $live and $fair cell types, add support for s_eventually keyword

techlibs/common/simlib.v

@@ -1305,6 +1305,22 @@ endmodule
 
 // --------------------------------------------------------
 
+module \$live (A, EN);
+
+input A, EN;
+
+endmodule
+
+// --------------------------------------------------------
+
+module \$fair (A, EN);
+
+input A, EN;
+
+endmodule
+
+// --------------------------------------------------------
+
 module \$cover (A, EN);
 
 input A, EN;