deminout: Don't demote inouts with unused bits

Signed-off-by: David Shah <[email protected]>
2026-08-22 06:07:26 +02:00 · 2020-03-04 18:44:38 +00:00
parent 6edca05793
commit 5cae9c6e16
2 changed files with 15 additions and 2 deletions
@@ -0,0 +1,14 @@
+read_verilog <<EOT
+module top(input clk, inout [7:0] x);
+
+reg [3:0] ctr;
+always @(posedge clk) ctr <= ctr + 1'b1;
+
+assign x[7:4] = ctr;
+endmodule
+EOT
+proc
+tribuf
+deminout
+select -assert-count 1 i:x o:x %i
+