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Docs: Apply verific docs suggestions

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Krystine Sherwin
2024-08-23 09:23:57 +12:00
parent 3317d80480
commit 583d820dc2
3 changed files with 13 additions and 13 deletions
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docs/source/using_yosys/more_scripting/load_design.rst
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@@ -30,8 +30,9 @@ keyword: Frontends
.. note::
The Verific frontend for Yosys, which provides the :cmd:ref:`verific`
command, requires Yosys to be built with Verific. This is not the same as
simply having a Verific license when using Yosys. Check
command, requires Yosys to be built with Verific. For full functionality,
custom modifications to the Verific source code from YosysHQ are required,
but limited useability can be achieved with some stock Verific builds. Check
:doc:`/yosys_internals/extending_yosys/build_verific` for more.
Others:
docs/source/using_yosys/synthesis/memory.rst
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@@ -697,8 +697,8 @@ TDP with multiple read ports
Patterns only supported with Verific
------------------------------------
The following patterns are only supported when Yosys is built with the Verific
front-end.
The following patterns are only supported when the design is read in using the
Verific front-end.
Synchronous SDP with write-first behavior via blocking assignments
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~