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hashlib: acc -> eat
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+4
-4
@@ -4480,11 +4480,11 @@ void RTLIL::SigSpec::updhash() const
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for (auto &c : that->chunks_)
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if (c.wire == NULL) {
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for (auto &v : c.data)
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h.acc(v);
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h.eat(v);
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} else {
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h.acc(c.wire->name.index_);
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h.acc(c.offset);
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h.acc(c.width);
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h.eat(c.wire->name.index_);
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h.eat(c.offset);
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h.eat(c.width);
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}
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that->hash_ = h.yield();
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if (that->hash_ == 0)
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