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hierarchy interfaces: whitespace

This commit is contained in:
Emil J. Tywoniak 2026-05-05 15:23:21 +02:00
parent 963cad919c
commit 4d67f7ab95
1 changed files with 188 additions and 188 deletions
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2
passes/hierarchy/util/interfaces.cc
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@ -46,7 +46,7 @@ RTLIL::Module *check_if_top_has_changed(Design *design, Module *top_mod)
// the number of ports. // the number of ports.
// //
// Also do the same checks on the specified parameters. // Also do the same checks on the specified parameters.
void check_cell_connections(const RTLIL::Module &module, RTLIL::Cell &cell, RTLIL::Module &mod) static void check_cell_connections(const RTLIL::Module &module, RTLIL::Cell &cell, RTLIL::Module &mod)
{ {
int id; int id;
for (auto &conn : cell.connections()) { for (auto &conn : cell.connections()) {