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abstract: -state allow partial abstraction, don't use buffer-normalized mode

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This commit is contained in:
Emil J. Tywoniak
2025-02-18 17:08:45 +01:00
parent 6027030215
commit 387d0de383
2 changed files with 108 additions and 49 deletions
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tests/various/abstract.ys
+21
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@@ -15,6 +15,27 @@ abstract -state -enablen magic
check -assert
# show -prefix after_base
design -reset
read_verilog <<EOT
module fff (CLK, DDD, QQQ, Q, magic);
input CLK;
input [2:0] DDD;
output reg [2:0] QQQ;
output reg Q;
input magic;
always @(posedge CLK)
QQQ <= DDD;
assign Q = QQQ[0];
endmodule
EOT
proc
# show -prefix before_wide
abstract -state -enablen magic w:Q
# show -prefix after_wide
check -assert
design -reset
read_verilog <<EOT
module half_clock_en (CLK, E, Q, magic);