mirror of https://github.com/YosysHQ/yosys.git
Changed indexing to be based on the literal ID in EZSat and sorted to allow better hashing
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@ -200,12 +200,12 @@ struct SatClockgateWorker
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}
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// Simple random simulation test to quickly prune candidates
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bool simulationTest(SigBit candidate, SigSpec sig_d, SigSpec sig_q, bool as_enable)
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{
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// For now, skip simulation and go straight to SAT
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// TODO: Implement random simulation for faster pruning
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return true;
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}
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// bool simulationTest(SigBit candidate, SigSpec sig_d, SigSpec sig_q, bool as_enable)
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// {
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// // For now, skip simulation and go straight to SAT
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// // TODO: Implement random simulation for faster pruning
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// return true;
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// }
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// Binary search to minimize the gating condition set
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// Tries to remove half of the signals at a time
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@ -440,10 +440,15 @@ struct SatClockgateWorker
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continue;
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}
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// Create signature for this gating condition
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std::string sig;
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// Create signature for this gating condition (sorted by SAT literal ID for permutation invariance)
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std::vector<std::pair<int, SigBit>> sorted;
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for (auto bit : gating_conds)
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sig += log_signal(bit) + ",";
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sorted.push_back({satgen.importSigSpec(SigSpec(bit))[0], bit});
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std::sort(sorted.begin(), sorted.end());
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std::string sig;
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for (auto &[id, bit] : sorted)
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sig += std::to_string(id) + ",";
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sig += is_enable ? "E" : "D";
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// Check if we already have this condition
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