mirror of https://github.com/YosysHQ/yosys.git
dfflibmap: updated dlatchlibmap tests so they pass
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@ -29,7 +29,7 @@ design -load orig
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dfflibmap -liberty dlatchlibmap.lib
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clean
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select -assert-count 5 t:$_NOT_
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select -assert-count 4 t:$_NOT_
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select -assert-count 1 t:dlatchn
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select -assert-count 4 t:dlatchsr
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select -assert-none t:dlatchn t:dlatchsr t:$_NOT_ %% %n t:* %i
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@ -37,7 +37,7 @@ select -assert-none t:dlatchn t:dlatchsr t:$_NOT_ %% %n t:* %i
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design -load orig
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dfflibmap -prepare -liberty dlatchlibmap.lib
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select -assert-count 11 t:$_NOT_
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select -assert-count 9 t:$_NOT_
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select -assert-count 1 t:$_DLATCH_N_
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select -assert-count 4 t:$_DLATCHSR_PPP_
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select -assert-none t:$_DLATCH_N_ t:$_DLATCHSR_PPP_ t:$_NOT_ %% %n t:* %i
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@ -45,16 +45,20 @@ select -assert-none t:$_DLATCH_N_ t:$_DLATCHSR_PPP_ t:$_NOT_ %% %n t:* %i
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design -load orig
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dfflibmap -map-only -liberty dlatchlibmap.lib
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select -assert-count 6 t:$_NOT_
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select -assert-count 5 t:$_NOT_
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select -assert-count 0 t:dlatchn
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select -assert-count 1 t:dlatchsr
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select -assert-count 1 t:$_DLATCH_P_
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select -assert-count 1 t:$_DLATCH_PP0_
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select -assert-count 1 t:$_DLATCH_PP1_
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select -assert-count 1 t:$_DLATCHSR_NNN_
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design -load orig
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dfflibmap -prepare -liberty dlatchlibmap.lib
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dfflibmap -map-only -liberty dlatchlibmap.lib
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clean
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select -assert-count 5 t:$_NOT_
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select -assert-count 4 t:$_NOT_
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select -assert-count 1 t:dlatchn
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select -assert-count 4 t:dlatchsr
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select -assert-none t:dlatchn t:dlatchsr t:$_NOT_ %% %n t:* %i
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@ -64,7 +68,7 @@ dfflibmap -prepare -liberty dlatchlibmap_dlatchn.lib -liberty dlatchlibmap_dlatc
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dfflibmap -map-only -liberty dlatchlibmap_dlatchn.lib -liberty dlatchlibmap_dlatchsr_r.lib
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clean
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select -assert-count 5 t:$_NOT_
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select -assert-count 4 t:$_NOT_
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select -assert-count 1 t:dlatchn
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select -assert-count 4 t:dlatchsr
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select -assert-none t:dlatchn t:dlatchsr t:$_NOT_ %% %n t:* %i
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@ -79,14 +83,15 @@ select -assert-count 5 t:dlatchsr
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design -load orig
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dfflibmap -liberty dlatchlibmap.lib -liberty dlatchlibmap_dlatchsr_mixedpol.lib -dont_use dlatchsr
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clean
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# We have one more _NOT_ than with the regular dlatchsr
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select -assert-count 6 t:$_NOT_
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select -assert-count 5 t:$_NOT_
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select -assert-count 1 t:dlatchn
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select -assert-count 4 t:dlatchsr_mixedpol
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# The additional NOT is on latch2.
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# Originally, latch2.R is an active high "set".
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# dlatchsr_mixedpol has functionally swapped labels due to the next_state inversion,
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# so we use its CLEAR port for the "set",
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# Originally, latch2.R is an active high "preset".
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# dlatchsr_mixedpol has functionally swapped labels due to the data_in inversion,
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# so we use its CLEAR port for the "preset",
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# but we have to invert it because the CLEAR pin is active low.
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# latch2.CLEAR = !R
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select -assert-count 1 c:latch2 %x:+[CLEAR] %ci t:$_NOT_ %i
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@ -122,10 +122,6 @@ $_DLATCH_P_ latch0 (.E(E), .D(D), .Q(Q[0]));
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$_DLATCH_PP0_ latch1 (.E(E), .D(D), .R(R), .Q(Q[1]));
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$_DLATCH_PP1_ latch2 (.E(E), .D(D), .R(R), .Q(Q[2]));
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// TODO: this comment is just a copy from 'dfflibmap_formal.ys'
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// Formal checking of directly instantiated DLATCHSR doesn't work at the moment
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// likely due to an equiv_induct -set-assumes assume bug #5196
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// no assume when mapping to unset clear_preset_var
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$_DLATCHSR_PPP_ latch3 (.E(E), .D(D), .R( R), .S( S), .Q(Q[3]));
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$_DLATCHSR_NNN_ latch4 (.E(E), .D(D), .R(~R), .S(~S), .Q(Q[4]));
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@ -199,7 +195,7 @@ read_verilog <<EOT
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module top(input E, D, S, R, output Q);
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// DLATCHSR with priority R over S
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always_latch
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always @*
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if (R) Q <= 1'b0;
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else if (S) Q <= 1'b1;
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else if (E) Q <= D;
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@ -230,7 +226,7 @@ read_verilog <<EOT
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module top(input E, D, R, output Q);
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// DLATCH with preset
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always_latch
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always @*
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if (~R) Q <= 1'b1;
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else if (E) Q <= D;
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endmodule
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