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SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()
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@@ -801,7 +801,7 @@ void RTLIL::Module::cloneInto(RTLIL::Module *new_mod) const
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RTLIL::Module *mod;
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void operator()(RTLIL::SigSpec &sig)
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{
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for (auto &c : sig.chunks())
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for (auto &c : sig.chunks_rw())
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if (c.wire != NULL)
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c.wire = mod->wires.at(c.wire->name);
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}
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