mirror of https://github.com/YosysHQ/yosys.git
fix compilation err
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e7ffe7a7df
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1298607d95
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@ -1285,7 +1285,7 @@ struct SimInstance
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Const vcd_val = Const::from_string(shared->fst->valueOf(item.second));
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Const sim_val = get_state(wire);
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if (sim_val != vcd_val) {
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if (debug)
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if (shared->debug)
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log_warning("Register mismatch at time %lu%s for %s.%s: "
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"sim=%s vcd=%s, overwriting...\n",
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(unsigned long)time,
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