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Auto-generate .box/.lut files from specify blocks
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@@ -619,7 +619,7 @@ struct SynthXilinxPass : public ScriptPass
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if (dff_mode)
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techmap_args += " -D DFF_MODE";
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run("techmap " + techmap_args);
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run("read_verilog -icells -lib +/xilinx/abc9_model.v");
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run("read_verilog -icells -specify -lib +/xilinx/abc9_model.v");
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std::string abc9_opts = " -box +/xilinx/abc9_xc7.box";
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auto k = stringf("synth_xilinx.abc9.%s.W", family.c_str());
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if (active_design->scratchpad.count(k))
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