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synth_gatemate: Apply review remarks

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* remove unused techmap models in `map_regs.v`
* replace RAM initilization loops with 320-bit-writes
* add script to test targets in top-level Makefile
* remove `MAXWIDTH` parameter and treat both vector widths individually in `mult_map.v`
* iterate over all modules in `gatemate_bramopt` pass
This commit is contained in:
Patrick Urban
2021-11-13 21:53:25 +01:00
committed by Marcelina Kościelnicka
parent cfcc38582a
commit 0a72952d5f
6 changed files with 212 additions and 279 deletions
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techlibs/gatemate/reg_map.v
-61
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@@ -17,54 +17,6 @@
*
*/
(* techmap_celltype = "$_DFF_[NP]_" *)
module \$_DFF_x_ (input D, C, output Q);
parameter _TECHMAP_CELLTYPE_ = "";
CC_DFF #(
.CLK_INV((_TECHMAP_CELLTYPE_[15:8] == "N")),
.EN_INV(1'b0),
.SR_INV(1'b0),
.SR_VAL(1'b0)
) _TECHMAP_REPLACE_ (.D(D), .EN(1'b1), .CLK(C), .SR(1'b0), .Q(Q));
wire _TECHMAP_REMOVEINIT_Q_ = 1'b1;
endmodule
(* techmap_celltype = "$_DFF_[NP][NP][01]_" *)
module \$_DFF_xxx_ (input D, C, R, output Q);
parameter _TECHMAP_CELLTYPE_ = "";
CC_DFF #(
.CLK_INV(_TECHMAP_CELLTYPE_[31:24] == "N"),
.EN_INV(1'b0),
.SR_INV(_TECHMAP_CELLTYPE_[23:16] == "N"),
.SR_VAL(_TECHMAP_CELLTYPE_[15:8] == "1")
) _TECHMAP_REPLACE_ (.D(D), .EN(1'b1), .CLK(C), .SR(R), .Q(Q));
wire _TECHMAP_REMOVEINIT_Q_ = 1'b1;
endmodule
(* techmap_celltype = "$_DFFE_[NP][NP]_" *)
module \$_DFFE_xx_ (input D, C, E, output Q);
parameter _TECHMAP_CELLTYPE_ = "";
CC_DFF #(
.CLK_INV(_TECHMAP_CELLTYPE_[23:16] == "N"),
.EN_INV(_TECHMAP_CELLTYPE_[15:8] == "N"),
.SR_INV(1'b0),
.SR_VAL(1'b0)
) _TECHMAP_REPLACE_ (.D(D), .EN(E), .CLK(C), .SR(1'b0), .Q(Q));
wire _TECHMAP_REMOVEINIT_Q_ = 1'b1;
endmodule
(* techmap_celltype = "$_DFFE_[NP][NP][01][NP]_" *)
module \$_DFFE_xxxx_ (input D, C, R, E, output Q);
@@ -81,19 +33,6 @@ module \$_DFFE_xxxx_ (input D, C, R, E, output Q);
endmodule
(* techmap_celltype = "$_DLATCH_[NP]_" *)
module \$_DLATCH_x_ (input E, D, output Q);
parameter _TECHMAP_CELLTYPE_ = "";
CC_DLT #(
.G_INV(_TECHMAP_CELLTYPE_[15:8] == "N"),
.SR_INV(1'b0),
.SR_VAL(1'b0)
) _TECHMAP_REPLACE_ (.D(D), .G(E), .SR(1'b0), .Q(Q));
endmodule
(* techmap_celltype = "$_DLATCH_[NP][NP][01]_" *)
module \$_DLATCH_xxx_ (input E, R, D, output Q);