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tests: adjust to input_port and init behavior (sketchy)

This commit is contained in:
Emil J. Tywoniak 2026-03-10 14:02:46 +01:00
parent 42a75ffda9
commit 0673455daa
1 changed files with 8 additions and 7 deletions
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15
tests/opt/opt_dff_dffmux.ys
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@ -9,7 +9,7 @@ proc
equiv_opt -assert opt equiv_opt -assert opt
design -load postopt design -load postopt
select -assert-count 1 t:$dffe r:WIDTH=2 %i select -assert-count 1 t:$dffe r:WIDTH=2 %i
select -assert-count 0 t:$dffe %% t:* %D select -assert-count 0 t:$dffe %% t:* %D t:$input_port %d
#################### ####################
@ -25,7 +25,7 @@ equiv_opt -assert opt
design -load postopt design -load postopt
wreduce wreduce
select -assert-count 1 t:$dffe r:WIDTH=2 %i select -assert-count 1 t:$dffe r:WIDTH=2 %i
select -assert-count 0 t:$dffe %% t:* %D select -assert-count 0 t:$dffe %% t:* %D t:$input_port %d
################### ###################
@ -40,7 +40,7 @@ proc
equiv_opt -assert opt equiv_opt -assert opt
design -load postopt design -load postopt
select -assert-count 1 t:$dffe r:WIDTH=2 %i select -assert-count 1 t:$dffe r:WIDTH=2 %i
select -assert-count 0 t:$dffe %% t:* %D select -assert-count 0 t:$dffe %% t:* %D t:$input_port %d
################### ###################
@ -54,8 +54,9 @@ EOT
proc proc
equiv_opt -assert opt equiv_opt -assert opt
design -load postopt design -load postopt
dump
select -assert-count 1 t:$dffe r:WIDTH=4 %i select -assert-count 1 t:$dffe r:WIDTH=4 %i
select -assert-count 0 t:$dffe %% t:* %D select -assert-count 0 t:$dffe %% t:* %D t:$input_port %d
#################### ####################
@ -71,7 +72,7 @@ equiv_opt -assert opt
design -load postopt design -load postopt
wreduce wreduce
select -assert-count 1 t:$sdffe r:WIDTH=2 %i select -assert-count 1 t:$sdffe r:WIDTH=2 %i
select -assert-count 0 t:$sdffe %% t:* %D select -assert-count 0 t:$sdffe %% t:* %D t:$input_port %d
#################### ####################
@ -90,7 +91,7 @@ equiv_opt -assert opt
design -load postopt design -load postopt
wreduce wreduce
select -assert-count 1 t:$sdffe r:WIDTH=2 %i select -assert-count 1 t:$sdffe r:WIDTH=2 %i
select -assert-count 0 t:$sdffe %% t:* %D select -assert-count 0 t:$sdffe %% t:* %D t:$input_port %d
#################### ####################
@ -126,4 +127,4 @@ sat -tempinduct -verify -prove-asserts -show-ports miter
design -load gate design -load gate
select -assert-count 1 t:$sdffe r:WIDTH=3 %i select -assert-count 1 t:$sdffe r:WIDTH=3 %i
select -assert-count 0 t:$sdffe %% t:* %D select -assert-count 0 t:$sdffe %% t:* %D t:$input_port %d