mirror of https://github.com/YosysHQ/yosys.git
Revert rtlil changes
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2b247d165b
commit
0485576632
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@ -3489,7 +3489,7 @@ DEF_METHOD(Shiftx, sig_a.size(), ID($shiftx))
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} \
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RTLIL::SigSpec RTLIL::Module::_func(RTLIL::IdString name, const RTLIL::SigSpec &sig_a, const RTLIL::SigSpec &sig_b, const RTLIL::SigSpec &sig_s, const std::string &src) { \
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Module *module = this; \
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RTLIL::SigSpec sig_y = addWire(NEW_ID4_SUFFIX("y"), sig_a.size()); \
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RTLIL::SigSpec sig_y = addWire(!_pmux ? NEW_ID : NEW_ID4_SUFFIX("y"), sig_a.size()); \
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add ## _func(name, sig_a, sig_b, sig_s, sig_y, src); \
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return sig_y; \
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} // SILIMATE: Improve the naming (NOT IMPROVED FOR MUX!)
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@ -3579,7 +3579,7 @@ DEF_METHOD(Bweqx, ID($bweqx))
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} \
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RTLIL::SigBit RTLIL::Module::_func(RTLIL::IdString name, const RTLIL::SigBit &sig1, const RTLIL::SigBit &sig2, const RTLIL::SigBit &sig3, const std::string &src) { \
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Module *module = this; \
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RTLIL::SigBit sig4 = addWire(NEW_ID4_SUFFIX(#_P4)); \
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RTLIL::SigBit sig4 = addWire(_mux ? NEW_ID : NEW_ID4_SUFFIX(#_P4)); \
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add ## _func(name, sig1, sig2, sig3, sig4, src); \
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return sig4; \
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} // SILIMATE: Improve the naming (NOT IMPROVED AT ALL!)
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