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cxxrtl: Add internal cell "bwmux"
Mirrors the implementation for the smt2 backend Co-authored-by: Martin Povišer <[email protected]>
This commit is contained in:
committed by
Catherine
co-authored by
Martin Povišer
parent
c894685f26
commit
04098933c7
@@ -200,7 +200,7 @@ bool is_extending_cell(RTLIL::IdString type)
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bool is_inlinable_cell(RTLIL::IdString type)
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{
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return is_unary_cell(type) || is_binary_cell(type) || type.in(
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ID($mux), ID($concat), ID($slice), ID($pmux), ID($bmux), ID($demux));
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ID($mux), ID($concat), ID($slice), ID($pmux), ID($bmux), ID($demux), ID($bwmux));
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}
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bool is_ff_cell(RTLIL::IdString type)
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@@ -1198,6 +1198,14 @@ struct CxxrtlWorker {
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f << ">(";
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dump_sigspec_rhs(cell->getPort(ID::S), for_debug);
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f << ").val()";
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// Bitwise muxes
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} else if (cell->type == ID($bwmux)) {
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dump_sigspec_rhs(cell->getPort(ID::A), for_debug);
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f << ".bwmux(";
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dump_sigspec_rhs(cell->getPort(ID::B), for_debug);
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f << ",";
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dump_sigspec_rhs(cell->getPort(ID::S), for_debug);
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f << ").val()";
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// Demuxes
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} else if (cell->type == ID($demux)) {
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dump_sigspec_rhs(cell->getPort(ID::A), for_debug);
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@@ -498,6 +498,11 @@ struct value : public expr_base<value<Bits>> {
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return result;
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}
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CXXRTL_ALWAYS_INLINE
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value<Bits> bwmux(const value<Bits> &b, const value<Bits> &s) const {
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return (bit_and(s.bit_not())).bit_or(b.bit_and(s));
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}
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template<size_t ResultBits, size_t SelBits>
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value<ResultBits> demux(const value<SelBits> &sel) const {
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static_assert(Bits << SelBits == ResultBits, "invalid sizes used in demux()");
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