mirror of https://github.com/YosysHQ/yosys.git
16 lines
353 B
Python
16 lines
353 B
Python
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from pyosys import libyosys as ys
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from pathlib import Path
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__file_dir__ = Path(__file__).absolute().parent
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d = ys.Design()
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ys.run_pass(f"read_verilog {__file_dir__ / 'spm.cut.v.gz'}", d)
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ys.run_pass("hierarchy -top spm", d)
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for idstr, cell in d.top_module().cells_.items():
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cell.set_bool_attribute("\\set")
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print(cell.attributes)
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break
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