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docs: Tidying image generation
2023-11-15 17:39:37 +13:00
read_verilog memdemo.v
prep -top memdemo; memory; opt
cd memdemo
show -format dot -prefix memdemo_00
show -format dot -prefix memdemo_01 y %ci2
Docs: work on selections.rst
2024-01-26 17:29:59 +13:00
show -format dot -prefix memdemo_02 y %ci5
show -format dot -prefix memdemo_03 y %ci5:-$mux[S]
show -format dot -prefix memdemo_04 y %ci*:-[CLK,S]:+$dff,$mux
show -format dot -prefix memdemo_05 y %ci2:+$dff[Q,D] %ci*:-$mux[S]:-$dff
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