2019-12-06 09:01:16 +01:00
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../../../yosys -qp "synth_xilinx -top macc2; rename -top macc2_uut" -o macc_uut.v macc.v
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2019-10-18 11:18:53 +02:00
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iverilog -o test_macc macc_tb.v macc_uut.v macc.v ../../../techlibs/xilinx/cells_sim.v
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2019-09-20 03:08:16 +02:00
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vvp -N ./test_macc
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2019-12-22 20:43:39 +01:00
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../../../yosys -qp "synth_xilinx -family xc6s -top macc2; rename -top macc2_uut" -o macc_uut.v macc.v
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iverilog -o test_macc macc_tb.v macc_uut.v macc.v ../../../techlibs/xilinx/cells_sim.v
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vvp -N ./test_macc
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