yosys/tests/various/abc9.v

mirror of https://github.com/YosysHQ/yosys.git
module abc9_test032(input clk, d, r, output reg q);
initial q = 1'b0;
always @(negedge clk or negedge r)
    if (!r) q <= 1'b0;
    else q <= d;
endmodule
Merge remote-tracking branch 'origin/xaig_dff' into eddie/xaig_dff_adff 2019-11-22 01:32:52 +01:00			`module abc9_test032(input clk, d, r, output reg q);`
Add a equiv test too 2019-11-20 02:05:14 +01:00			`initial q = 1'b0;`
			`always @(negedge clk or negedge r)`
Another sloppy mistake! 2019-11-22 01:33:20 +01:00			`if (!r) q <= 1'b0;`
Add a equiv test too 2019-11-20 02:05:14 +01:00			`else q <= d;`
			`endmodule`