47 lines
1.5 KiB
Plaintext
47 lines
1.5 KiB
Plaintext
v {xschem version=3.4.4 file_version=1.2
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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* Copyright (C) 1998-2024 Stefan Frederik Schippers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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G {}
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K {type=switch
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function1="0 Z 3 M"
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function2="Z 0 3 M"
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template="name=s1"
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}
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V {}
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S {}
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E {}
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L 4 10 -10 30 -10 {}
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L 4 -30 0 -10 0 {}
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L 4 0 -40 0 0 {}
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L 4 10 10 30 10 {}
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L 4 -10 0 10 0 {}
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L 4 -20 -5 -10 0 {}
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L 4 -20 5 -10 0 {}
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B 5 -32.5 -2.5 -27.5 2.5 {name=t0 dir=inout goto=1,2}
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B 5 27.5 7.5 32.5 12.5 {name=t1 dir=inout }
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B 5 27.5 -12.5 32.5 -7.5 {name=t2 dir=inout }
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B 5 -2.5 -42.5 2.5 -37.5 {name=g dir=inout goto=1,2}
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A 4 -8.75 0 1.25 360 360 {fill=true}
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A 4 10 -10 1.25 0 360 {fill=true}
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A 4 10 10 1.25 0 360 {fill=true}
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T {1} 20 -17.5 0 0 0.1 0.1 {}
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T {0} 20 2.5 0 0 0.1 0.1 {}
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