151 lines
4.4 KiB
XML
151 lines
4.4 KiB
XML
v {xschem version=3.4.4 file_version=1.2
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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* Copyright (C) 1998-2024 Stefan Frederik Schippers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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G {}
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K {}
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V {}
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S {}
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E {}
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B 2 10 -900 810 -500 {flags=graph
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y1=2.3e-06
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y2=5.1
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ypos1=0
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ypos2=2
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divy=5
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subdivy=1
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unity=1
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x1=-0.00212084
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x2=0.0379531
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divx=5
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subdivx=1
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node="vssload
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vref"
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color="4 8"
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dataset=-1
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unitx=1
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logx=0
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logy=0
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}
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B 2 10 -1300 810 -900 {flags=graph
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y1=-3.6e-05
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y2=0.066
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ypos1=0
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ypos2=2
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divy=5
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subdivy=1
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unity=1
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x1=-0.00212084
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x2=0.0379531
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divx=5
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subdivx=1
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dataset=-1
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unitx=1
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logx=0
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logy=0
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color=4
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node=i(vmeasure)}
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N 360 -200 360 -190 {lab=VREF}
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N 360 -130 360 -110 {lab=VSS}
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N 360 -260 360 -200 {lab=VREF}
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N 360 -230 450 -230 {lab=VREF}
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N 360 -350 360 -320 {lab=VCC}
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N 450 -410 450 -310 {lab=VSSLOAD}
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N 450 -410 950 -410 {lab=VSSLOAD}
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N 950 -460 950 -390 {lab=VSSLOAD}
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N 950 -330 950 -300 {lab=D}
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N 680 -150 700 -150 {lab=#net1}
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N 590 -150 620 -150 {lab=RST}
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N 740 -270 740 -180 {lab=#net2}
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N 810 -250 810 -230 {lab=G}
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N 720 -270 740 -270 {lab=#net2}
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N 740 -200 770 -200 {lab=#net2}
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N 810 -240 860 -240 {lab=G}
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N 860 -270 860 -240 {lab=G}
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N 860 -270 910 -270 {lab=G}
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C {code.sym} 1060 -350 0 0 {name=STIMULI
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tedax_ignore=true
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only_toplevel=true
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tclcommand="xschem edit_vi_prop"
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value="
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*.option PARHIER=LOCAL RUNLVL=5 post MODMONTE=1 warn maxwarns=400 ingold=1
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vvcc vcc 0 dc 5
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vvss vss 0 dc 0
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vrst rst 0 pwl 0 5 100u 5 101u 0
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** models are generally not free: you must download
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** SPICE models for active devices and put them into the below
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** referenced file in netlist/simulation directory.
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.include \\"models_pcb_current_protection.txt\\"
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* .dc RLOAD 10K 1 -0.001
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.control
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save all
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tran 10u 200m
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write pcb_current_protection.raw
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.endc
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"}
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C {title.sym} 160 -30 0 0 {name=l2 author="Stefan"}
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C {lab_pin.sym} 90 -280 0 1 {name=p8 lab=VCC}
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C {conn_8x1.sym} 70 -260 0 0 {name=C2}
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C {lab_pin.sym} 90 -260 0 1 {name=p9 lab=VSS}
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C {lm358.sym} 530 -270 0 0 {name=U3:1
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spiceprefix=X
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VCC=VCC
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VNN=VSS
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url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=3&ved=2ahUKEwi8_s-Z5KTfAhUmy4UKHbDOBUIQFjACegQICBAC&url=https%3A%2F%2Fwww.sparkfun.com%2Fdatasheets%2FComponents%2FGeneral%2FLM358.pdf&usg=AOvVaw0pOnlomz_hkzyk7OvZBPFv"
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}
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C {res.sym} 360 -160 0 0 {name=R3 m=1 value=4k footprint=1206}
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C {res.sym} 360 -290 0 0 {name=R4 m=1 value=100k footprint=1206}
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C {gnd.sym} 360 -110 0 0 {name=l0 lab=VSS}
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C {nmos.sym} 930 -270 0 0 {name=M2
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spiceprefix=X}
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C {res.sym} 950 -360 0 0 {name=R5 m=1 value=1 footprint=1206}
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C {gnd.sym} 950 -240 0 0 {name=l6 lab=VSS}
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C {vdd.sym} 360 -350 0 0 {name=l7 lab=VCC}
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C {vdd.sym} 950 -580 0 0 {name=l8 lab=VCC}
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C {lab_pin.sym} 950 -430 0 0 {name=p1 lab=VSSLOAD}
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C {lab_pin.sym} 360 -210 0 0 {name=p2 lab=VREF}
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C {res.sym} 950 -490 0 0 {name=RLOAD m=1 value="R='1/(time+1e-7)'" footprint=1206}
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C {ammeter.sym} 950 -550 0 0 {name=vmeasure}
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C {lab_wire.sym} 890 -270 0 0 {name=l12 lab=G}
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C {lab_pin.sym} 950 -320 0 0 {name=p3 lab=D}
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C {res.sym} 690 -270 1 0 {name=R2 m=1 value=20k footprint=1206}
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C {npn.sym} 720 -150 0 0 {name=Q1 model=q2n2222
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url="http://html.alldatasheet.com/html-pdf/17919/PHILIPS/MMBT2222/499/2/MMBT2222.html"
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}
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C {gnd.sym} 740 -120 0 0 {name=l16 lab=VSS}
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C {lab_pin.sym} 590 -150 0 0 {name=p4 lab=RST}
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C {res.sym} 650 -150 1 0 {name=R6 m=1 value=20k footprint=1206}
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C {lab_pin.sym} 90 -240 0 1 {name=p5 lab=RST}
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C {npn.sym} 790 -200 0 0 {name=Q2 model=q2n2222
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url="http://html.alldatasheet.com/html-pdf/17919/PHILIPS/MMBT2222/499/2/MMBT2222.html"
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}
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C {gnd.sym} 810 -170 0 0 {name=l11 lab=VSS}
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C {res.sym} 810 -280 2 0 {name=R1 m=1 value=20k footprint=1206}
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C {vdd.sym} 810 -310 0 0 {name=l13 lab=VCC}
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C {launcher.sym} 340 -460 0 0 {name=h5
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descr="load waves"
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tclcommand="xschem raw_read $netlist_dir/pcb_current_protection.raw tran"
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}
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