35 lines
1.3 KiB
XML
35 lines
1.3 KiB
XML
v {xschem version=3.4.6RC file_version=1.2
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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* Copyright (C) 1998-2024 Stefan Frederik Schippers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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G {}
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K {}
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V {}
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S {vout out 0 2}
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E {}
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C {ipin.sym} 120 -550 0 0 {name=p161 lab=PLUS}
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C {ipin.sym} 120 -500 0 0 {name=p1 lab=MINUS}
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C {opin.sym} 200 -530 0 0 {name=p20 lab=OUT}
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C {noconn.sym} 200 -530 0 0 {name=l1}
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C {noconn.sym} 120 -550 0 1 {name=l2}
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C {noconn.sym} 120 -500 0 1 {name=l3}
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C {architecture.sym} 60 -600 0 0 {code=ARCHITECTURE
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"Use global schematic properties for code"}
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