53 lines
1.6 KiB
Plaintext
53 lines
1.6 KiB
Plaintext
v {xschem version=3.4.4 file_version=1.2
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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* Copyright (C) 1998-2024 Stefan Frederik Schippers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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G {}
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K {type=vsource
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format="@name @pinlist \\\\
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pulse 0 @vhi \\\\
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'0.495/ @freq ' \\\\
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'0.01/@freq ' \\\\
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'0.01/@freq ' \\\\
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'0.49/@freq ' \\\\
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'1/@freq '"
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template="name=V1 vhi=3 freq=1e6"
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}
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V {}
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S {}
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E {}
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L 4 2.5 -22.5 7.5 -22.5 {}
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L 4 5 -25 5 -20 {}
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L 4 -0 15 -0 30 {}
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L 4 0 -30 -0 -15 {}
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L 4 -10 5 -5 5 {}
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L 4 -5 5 -2.5 -10 {}
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L 4 -2.5 -10 2.5 -10 {}
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L 4 2.5 -10 5 5 {}
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L 4 5 5 10 5 {}
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B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout}
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B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
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A 4 0 0 15 270 360 {}
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T {V=@vhi} 20 -6.25 0 0 0.2 0.2 {}
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T {@name} 20 -18.75 0 0 0.2 0.2 {}
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T {@#0:net_name} 10 -30 0 0 0.15 0.15 {layer=15 hide=instance}
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T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
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T {f=@freq Hz} 20 6.25 0 0 0.2 0.2 {}
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