59 lines
1.9 KiB
Plaintext
59 lines
1.9 KiB
Plaintext
v {xschem version=3.4.4 file_version=1.2
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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* Copyright (C) 1998-2024 Stefan Frederik Schippers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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G {type=crystal
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format="@name @pinlist @symname"
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verilog_format="tran @name (@@P\\\\, @@M\\\\);"
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tedax_format="footprint @name @footprint
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value @name @value
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device @name @device
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@comptag"
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template="name=X1
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value=12MHz
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footprint=CRYSTAL\\ 300
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device=CRYSTAL"
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}
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V {}
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S {}
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E {}
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L 4 0 12.5 0 30 {}
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L 4 0 -30 0 -12.5 {}
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L 4 -15 12.5 15 12.5 {}
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L 4 -15 -12.5 15 -12.5 {}
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L 4 -30 -0 -15 -0 {}
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L 4 -15 0 -15 5 {}
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L 4 -18.75 5 -11.25 5 {}
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L 4 -18.75 7.5 -11.25 7.5 {}
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L 4 -15 7.5 -15 12.5 {}
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L 4 -15 -12.5 -15 -7.5 {}
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L 4 -18.75 -7.5 -11.25 -7.5 {}
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L 4 -18.75 -5 -11.25 -5 {}
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L 4 -15 -5 -15 0 {}
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B 4 -7.5 -7.5 7.5 7.5 {}
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B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1}
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B 5 -32.5 -2.5 -27.5 2.5 {name=G dir=inout propag=0 pinnumber=2}
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B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=3}
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T {@name} 25 -13.75 0 0 0.2 0.2 {}
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T {@value} 25 1.25 0 0 0.2 0.2 {}
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T {@#0:pinnumber} 5 -26.25 0 0 0.2 0.2 {layer=13}
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T {@#2:pinnumber} 5 16.25 0 0 0.2 0.2 {layer=13}
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T {@#1:pinnumber} -22.5 -13.75 0 1 0.2 0.2 {layer=13}
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