135 lines
3.7 KiB
XML
135 lines
3.7 KiB
XML
v {xschem version=2.9.7 file_version=1.2}
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G {}
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V {}
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S {
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}
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E {}
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L 4 250 -340 270 -360 {}
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L 4 250 -340 290 -340 {}
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L 4 270 -360 290 -340 {}
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L 4 270 -260 290 -280 {}
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L 4 250 -280 290 -280 {}
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L 4 250 -280 270 -260 {}
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L 4 270 -340 270 -280 {}
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L 4 350 -620 370 -600 {dash=3}
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L 4 370 -640 370 -600 {dash=3}
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L 4 350 -620 370 -640 {dash=3}
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L 4 370 -620 530 -620 {dash=3}
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L 4 1400 -290 1420 -310 {dash=3}
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L 4 1400 -330 1400 -290 {dash=3}
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L 4 1400 -330 1420 -310 {dash=3}
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L 4 1240 -310 1400 -310 {dash=3}
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P 4 7 530 -860 1130 -860 1130 -690 1390 -690 1390 -580 530 -580 530 -860 {dash=3}
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T {These 2 instances are equivalent} 290 -320 0 0 0.4 0.4 {}
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T {Example of using a schematic as a
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component instance instead of the
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usual symbol.
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LCC: Local Custom Cell.
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LCC schematic instantiation show actual parameters
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in the schematic instance.} 550 -840 0 0 0.6 0.6 {}
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T {LCC schematics can be nested
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If only .sch is used there is
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no need for a .sym file at all} 910 -430 0 0 0.6 0.6 {}
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N 410 -140 410 -120 {lab=HALF}
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N 410 -230 430 -230 {lab=ZZ}
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N 410 -230 410 -200 {lab=ZZ}
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N 420 -440 420 -420 {lab=HALF}
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N 420 -530 700 -530 {lab=Z}
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N 420 -530 420 -500 {lab=Z}
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N 700 -530 700 -240 {lab=Z}
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N 700 -240 1450 -240 {lab=Z}
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N 320 -230 410 -230 {lab=ZZ}
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N 330 -530 420 -530 {lab=Z}
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C {vsource.sym} 50 -140 0 0 {name=V1 value="pwl 0 0 1u 0 5u 3"}
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C {lab_pin.sym} 50 -170 0 0 {name=p4 lab=AA}
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C {lab_pin.sym} 50 -110 0 0 {name=p5 lab=0}
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C {code_shown.sym} 580 -150 0 0 {name=STIMULI
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only_toplevel=true
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tclcommand="xschem edit_vi_prop"
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value="
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.tran 10n 10u uic
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.save all
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"}
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C {code.sym} 760 -170 0 0 {name=MODEL
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only_toplevel="true"
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tclcommand="xschem edit_vi_prop"
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value="************************************************
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* NOMINAL N-Channel Transistor *
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* UCB-3 Parameter Set *
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* HIGH-SPEED CMOS Logic Family *
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* 10-Jan.-1995 *
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************************************************
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.Model N NMOS (
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+LEVEL = 3
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+KP = 45.3E-6
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+VTO = 0.72
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+TOX = 51.5E-9
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+NSUB = 2.8E15
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+GAMMA = 0.94
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+PHI = 0.65
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+VMAX = 150E3
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+RS = 40
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+RD = 40
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+XJ = 0.11E-6
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+LD = 0.52E-6
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+DELTA = 0.315
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+THETA = 0.054
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+ETA = 0.025
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+KAPPA = 0.0
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+WD = 0.0 )
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***********************************************
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* NOMINAL P-Channel transistor *
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* UCB-3 Parameter Set *
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* HIGH-SPEED CMOS Logic Family *
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* 10-Jan.-1995 *
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***********************************************
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.Model P PMOS (
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+LEVEL = 3
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+KP = 22.1E-6
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+VTO = -0.71
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+TOX = 51.5E-9
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+NSUB = 3.3E16
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+GAMMA = 0.92
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+PHI = 0.65
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+VMAX = 970E3
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+RS = 80
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+RD = 80
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+XJ = 0.63E-6
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+LD = 0.23E-6
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+DELTA = 2.24
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+THETA = 0.108
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+ETA = 0.322
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+KAPPA = 0.0
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+WD = 0.0 )
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"}
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C {lab_pin.sym} 240 -230 0 0 {name=p6 lab=AA}
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C {lab_pin.sym} 430 -230 0 1 {name=p7 lab=ZZ}
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C {vsource.sym} 50 -240 0 0 {name=V2 value=3}
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C {lab_pin.sym} 50 -270 0 0 {name=p8 lab=VDD}
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C {lab_pin.sym} 50 -210 0 0 {name=p9 lab=0}
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C {res.sym} 410 -170 0 0 {name=R1
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value=20k
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 410 -120 0 0 {name=p10 lab=HALF}
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C {vsource.sym} 50 -340 0 0 {name=V3 value=1.5}
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C {lab_pin.sym} 50 -370 0 0 {name=p11 lab=HALF}
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C {lab_pin.sym} 50 -310 0 0 {name=p12 lab=0}
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C {lab_pin.sym} 200 -530 0 0 {name=p13 lab=AA}
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C {res.sym} 420 -470 0 0 {name=R2
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value=20k
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 420 -420 0 0 {name=p15 lab=HALF}
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C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
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C {cmos_inv.sch} 140 -300 0 0 {name=Xinv WN=15u WP=45u LLN=3u LLP=3u}
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C {cmos_inv.sym} 280 -230 0 0 {name=Xinv2 WN=15u WP=45u LLN=3u LLP=3u}
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C {bus_keeper.sch} 1200 60 0 0 {name=Xkeeper WN_FB=3u WP_FB=5u}
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C {lab_pin.sym} 700 -530 0 1 {name=p1 lab=Z}
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