15 lines
302 B
Plaintext
15 lines
302 B
Plaintext
v {xschem version=2.9.5_RC5 file_version=1.1}
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G {type=attributes
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spice_ignore=true
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verilog_ignore=true
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tedax_ignore=true
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template="
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attribute async_set_reset of RPTL : signal is "true";
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"}
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V {}
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S {}
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E {}
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L 4 -0 -10 355 -10 {}
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T {VHDL ATTRIBUTES} 5 -25 0 0 0.3 0.3 {}
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T {@prop_ptr} 45 5 0 0 0.2 0.2 {}
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