251 lines
10 KiB
HTML
251 lines
10 KiB
HTML
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<title>XSCHEM TUTORIAL: CREATE SYMBOL</title>
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<a href="xschem_man.html" class="home">UP</a>
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<h1> TUTORIAL: CREATE AN XSCHEM SYMBOL </h1>
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<p>
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In this tutorial we will build a 4011 CMOS quad 2-input NAND symbol.
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This IC has 4 nand gates (3 pins each, total 4*3=12 pins + VDD,VSS power pins)
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This device comes in a dual in line 14 pin package.<br>
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<img src="tutorial_create_symbol_000.png">
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<img src="tutorial_create_symbol_001.png">
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</p>
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<ol>
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<li>
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Start xschem giving <kbd> 4011-1.sym</kbd> as filename:<br>
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<img src="tutorial_create_symbol_00.png">
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</li>
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<li>
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use layer 4 (the default) to draw the following shapes, use <kbd>l</kbd> to draw lines
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and use <kbd>Shift-c</kbd> to draw arcs, use <kbd>Ctrl-Shift-c</kbd> to draw circles.
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Arcs and circles are drawn by specifying start - end point and a 3rd way point.
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You will need to change the grid snap to '5' for drawing the smallest objects
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using the <kbd>g</kbd> key. Be sure to restore the grid snap to the default value
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with <kbd>Shift-g</kbd> as soon as you are done. Also ensure that the gate terminals
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are on grid with the default '10' snap setting.
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Use the <kbd>m</kbd> key after selecting objects to move them around.
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<br>
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<img src="tutorial_create_symbol_01.png">
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<p class="important"> Do <b>NOT</b> forget to reset the grid setting to the default (10) value
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as soon as you finished drawing small objects, otherwise the rest of the objects will be all
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off grid making the symbol unusable</p><br>
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</li>
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<li>
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Create pins, select layer 5 from the <kbd>Layers</kbd> menu.
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Set grid snap to 2.5 to allow drawing small rectangles centered on gate terminals.
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Start from the 'A' input of the nand gate (we assume A to be the left-top input), then
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the 'B' input (the lower left input terminal), then the 'Z' output (the right terminal).
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If you click and hold the mouse selecting the rectangles the 'w' and 'h' dimensions are shown.
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They should be equal to 5. remember to reset the grid to default 10 when done. <br><br>
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<p class="important">Update: a more advanced command is now available to place a symbol pin: <kbd>Alt-p</kbd></p>
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</li>
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<img src="tutorial_create_symbol_02.png">
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<li>
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Now when <b>no object is selected</b> press <kbd>q</kbd> to edit the symbol global attributes. Type the following
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text: <br><br>
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<pre class="code">
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type=nand
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tedax_format="footprint @name @footprint
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device @name @device"
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template="name=U1 device=CD4011B footprint=\"dip(14)\" numslots=4 power=VCC ground=GND"
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extra="power ground"
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extra_pinnumber="14 7"
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</pre><br>
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<p class="important">Instead of the <kbd>q</kbd> key the attribute dialog box can also be displayed
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by <kbd>double clicking</kbd> the left mouse button</p><br>
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these attributes specify the gate type, the format for tedax netlist, the <kbd>template</kbd> attribute
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specifies default values for attributes and defines pin connection for VDD and VSS that are
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associated to package pins 14 and 7. The <kbd>device</kbd> attribute specifies the component name
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to be used in the tEDAx netlist (this is usually the name of the IC as shown in the datasheet).
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The <kbd>extra</kbd> and <kbd>extra_pinnumber</kbd> attributes specify extra pin connections that are
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implicit, not drawn on the symbol. This is one of the possible styles to handle power connections on
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slotted devices.<br>
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<img src="tutorial_create_symbol_03.png">
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</li>
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<li>
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Press the <kbd>t</kbd> to place some text; set text v and h size to 0.2 and write <kbd>@name</kbd>;
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this will be replaced with the instance name (aka refdes) when using the symbol in a schematic.
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Place a similar string with text <kbd>@symname</kbd> and place it under the @name string.<br>
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<img src="tutorial_create_symbol_04.png">
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</li>
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<li>
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select the red pins (click the mouse close to the interior side of the rectangle corners)
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and press <kbd>q</kbd>, set attribute <br>
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<kbd>name=A dir=in pinnumber=1:5:8:12</kbd> for the upper left pin,
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<kbd>name=B dir=in pinnumber=2:6:9:13</kbd> for the lower
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left pin, <kbd>name=Z dir=out pinnumber=3:4:10:11</kbd>
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for the right output pin. As you can see pin numbers 7 and 14 are missing from the list of pins; they
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used for VSS and VDD power supplies, which are implicit (no explicit pins).
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Since we are creating a slotted device (an IC containing 4 identical nand gates) the
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<kbd>pinnumber</kbd> attribute for each pin specifies the pin number for each slot, so the
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following: <kbd>name=A dir=in pinnumber=1:5:8:12</kbd> specifies that pin A of the nand gate is connected
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to package pin 1 for nand slot 1, to package pin 5 for nand slot 2 and so on.i
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The <kbd>dir</kbd> attribute specifies the direction of the pin; XSCHEM supports
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<kbd>in</kbd>, <kbd>out</kbd> and <kbd>inout</kbd> types. These attributes are used mainly for
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digital simulators (Verilog and VHDL), but specifying pin direction is good practice anyway.<br>
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<img src="tutorial_create_symbol_05.png">
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<p class="important">Instead of the <kbd>q</kbd> key the attribute dialog box can also be displayed
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by placing the mouse pointer over the pin object and pressing the <kbd>right</kbd> mouse button</p><br>
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</li>
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<li>
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We want now to place some text near the gate pins to display the pin number: again, use the <kbd>t</kbd> key
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and place the following text, with hsize and vsize set to 0.2:<br>
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<img src="tutorial_create_symbol_06.png"> <br>
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The complicated syntax of these text labels has the following meaning:<br>
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<ul>
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<li> The <kbd>@</kbd> is the variable expansion (macro) identifier, as usual.</li>
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<li> The <kbd>#0</kbd> specifies pin with index 0, this is the first pin we have created, the upper left
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nand input. The index of a pin can be viewed by selecting the pin and pressing
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<kbd>Shift-s</kbd>.</li>
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<li> The <kbd>pinnumber</kbd> specifies the attribute we want to be substituted with the actual value
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when placing the gate in a schematic as we will see shortly.</li>
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</ul><br>
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</li>
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<li>
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There is another syntax that can be used to display pin numbers, instead of specifying the pin index
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in XSCHEM list (that reflects the creation order) you can reference pins by their name;
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The only reason to use the previous syntax with pin index numbers is efficiency when dealing with
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extremely big symbols (SoC or similar high pin count chips).<br>
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<img src="tutorial_create_symbol_07.png">
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<li>
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The symbol is now complete; save it and close XSCHEM. Now open again xschem with an empty schematic,
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for example <kbd>xschem test.sch</kbd>. Press the <kbd>Insert</kbd> key and place the 4011-1 symbol:<br>
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<img src="tutorial_create_symbol_08.png"> <br>
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We see that all pin numbers are shown for each pin; this reminds us that this is a slotted device!
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slotted devices should specify the slot number in the instance <kbd>name</kbd> so, select the component, press
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<kbd>q</kbd> and change the <kbd>U1</kbd> name attribute to <kbd>U1:1</kbd>.
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You can also remove the <kbd>.sym</kbd> extension in the 'Symbol' entry of the dialog box,
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for more compactness:<br>
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<img src="tutorial_create_symbol_09.png"> <br>
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As you can see now the slot is resolved and the right pin numbers are displayed.
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Now select and copy the component (use the <kbd>c</kbd> key), and change the <kbd>name</kbd>
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attribute of the new copy to <kbd>U1:3</kbd>:<br>
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<img src="tutorial_create_symbol_10.png"> <br>
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</li>
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<li>
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Now draw some wires, for example to create an SR latch as shown, use the <kbd>w</kbd> key
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to draw wires; when done with the wiring insert a net label by pressing the <kbd>Insert</kbd>
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key and navigating to <kbd>.../share/xschem/xschem_library/devices</kbd> (the XSCHEM system
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symbol library) and selecting <kbd>lab_pin</kbd>:<br>
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<img src="tutorial_create_symbol_11.png"> <br>
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Place 4 of these <kbd>lab_pin</kbd> symbols and set their <kbd>lab</kbd> attribute
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to <kbd>S_, R_, Q, Q_</kbd> respectively;
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place the 4 labels as shown (use the <kbd>Shift-f</kbd> key to flip the <kbd>Q, Q_</kbd> labels):<br>
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<img src="tutorial_create_symbol_12.png"> <br>
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</li>
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<li>
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The test circuit for this tutorial is now complete: its time to extract the tEDAx netlist;
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press the <kbd>Shift-A</kbd> key to enable showing the netlist window, press
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<kbd>Shift-v</kbd> multiple times to set the netlisting mode as shown in the bottom status bar
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to <kbd>tedax</kbd>, and finally press the <kbd>Netlist</kbd> button located in the top-right
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region of the window: <br>
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<img src="tutorial_create_symbol_13.png"> <br>
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This is the resulting netlist you should get:<br><br>
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<pre class="code">
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tEDAx v1
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begin netlist v1 test
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conn Q U1 8
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pinslot U1 8 3
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pinidx U1 8 1
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pinname U1 8 A
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conn R_ U1 9
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pinslot U1 9 3
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pinidx U1 9 2
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pinname U1 9 B
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conn S_ U1 1
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pinslot U1 1 1
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pinidx U1 1 1
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pinname U1 1 A
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conn Q_ U1 10
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pinslot U1 10 3
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pinidx U1 10 3
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pinname U1 10 Z
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conn Q_ U1 2
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pinslot U1 2 1
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pinidx U1 2 2
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pinname U1 2 B
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pinslot U1 11 4
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pinidx U1 11 3
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pinname U1 11 Z
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conn Q U1 3
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pinslot U1 3 1
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pinidx U1 3 3
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pinname U1 3 Z
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pinslot U1 4 2
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pinidx U1 4 3
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pinname U1 4 Z
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pinslot U1 12 4
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pinidx U1 12 1
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pinname U1 12 A
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pinslot U1 13 4
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pinidx U1 13 2
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pinname U1 13 B
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pinslot U1 5 2
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pinidx U1 5 1
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pinname U1 5 A
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conn VCC U1 14
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pinname U1 14 power
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pinslot U1 6 2
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pinidx U1 6 2
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pinname U1 6 B
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conn GND U1 7
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pinname U1 7 ground
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footprint U1 dip(14)
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device U1 CD4011B
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end netlist
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</pre>
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</li>
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<p>
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This concludes the tutorial; of course this is not a complete circuit, connectors
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are missing among other things,
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but the basics of creating a new component should now be less obscure.
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</p>
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</ol>
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<br>
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