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xschem
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replaced select_connected_nets() with faster select_hilight_net(), net_name() used only for displaying net names will not trigger erc messages

This commit is contained in:
Stefan Schippers 2020-11-16 15:44:51 +01:00
parent fac9cfe26b
commit f6e85bc90c
7 changed files with 85 additions and 67 deletions
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2
src/callback.c
View File

@ -926,7 +926,7 @@ int callback(int event, int mx, int my, KeySym key,
}
if(key=='k' && state==Mod1Mask) /* select whole net (all attached wires/labels/pins) */
{
select_connected_nets();
select_hilight_net();
break;
}
if(key=='k' && state==ControlMask) /* unhilight net */

56
src/hilight.c
View File

@ -328,7 +328,7 @@ void hilight_net_pin_mismatches(void)
for(i=0;i<npin;i++) {
my_strdup(24, &labname,get_tok_value(rct[i].prop_ptr,"name",0));
my_strdup(25, &lab, expandlabel(labname, &mult));
my_strdup(26, &netname, net_name(j,i,&mult, 0));
my_strdup(26, &netname, net_name(j,i,&mult, 0, 1));
dbg(1, "delete_hilight_net(): i=%d labname=%s explabname = %s net = %s\n", i, labname, lab, netname);
if(netname && strcmp(lab, netname)) {
dbg(1, "delete_hilight_net(): hilight: %s\n", netname);
@ -692,11 +692,11 @@ void drill_hilight(void)
npin = symbol->rects[PINLAYER];
rct=symbol->rect[PINLAYER];
for(j=0; j<npin;j++) {
my_strdup(143, &netname, net_name(i, j, &mult, 1));
my_strdup(143, &netname, net_name(i, j, &mult, 1, 1));
propagate_str=get_tok_value(rct[j].prop_ptr, "propagate_to", 0);
if(propagate_str[0] && (entry=bus_hilight_lookup(netname, 0, XLOOKUP))) {
propagate = atoi(propagate_str);
my_strdup(144, &propagated_net, net_name(i, propagate, &mult, 1)); /* get net to propagate hilight to...*/
my_strdup(144, &propagated_net, net_name(i, propagate, &mult, 1, 1)); /* get net to propagate hilight to...*/
propag_entry = bus_hilight_lookup(propagated_net, entry->value, XINSERT); /* add net to highlight list */
if(!propag_entry) {
found=1; /* keep looping until no more nets are found. */
@ -937,6 +937,56 @@ void redraw_hilights(void)
if(!big) bbox(END , 0.0 , 0.0 , 0.0 , 0.0);
}
void select_hilight_net(void)
{
char *type=NULL;
int i;
struct hilight_hashentry *entry;
int hilight_connected_inst;
if(!hilight_nets) return;
prepare_netlist_structs(0);
for(i=0;i<xctx->wires;i++) {
if( (entry = bus_hilight_lookup(xctx->wire[i].node, 0, XLOOKUP)) ) {
xctx->wire[i].sel = SELECTED;
}
}
for(i=0;i<xctx->instances;i++) {
type = (xctx->inst[i].ptr+ xctx->sym)->type;
hilight_connected_inst = !strcmp(get_tok_value((xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "highlight", 0), "true") ||
!strcmp(get_tok_value(xctx->inst[i].prop_ptr, "highlight", 0), "true");
if( xctx->inst[i].flags & 4) {
dbg(1, "draw_hilight_net(): instance %d flags &4 true\n", i);
xctx->inst[i].sel = SELECTED;
}
else if(hilight_connected_inst) {
int rects, j;
dbg(2, "draw_hilight_net(): hilight_connected_inst inst=%d, node=%s\n", i, xctx->inst[i].node[0]);
if( (rects = (xctx->inst[i].ptr+ xctx->sym)->rects[PINLAYER]) > 0 ) {
for(j=0;j<rects;j++) {
if( xctx->inst[i].node && xctx->inst[i].node[j]) {
entry=bus_hilight_lookup(xctx->inst[i].node[j], 0, XLOOKUP);
if(entry) {
xctx->inst[i].sel = SELECTED;
break;
}
}
}
}
} else if( type && IS_LABEL_SH_OR_PIN(type) ) {
entry=bus_hilight_lookup( get_tok_value(xctx->inst[i].prop_ptr,"lab",0) , 0, XLOOKUP);
if(entry) xctx->inst[i].sel = SELECTED;
}
}
need_rebuild_selected_array = 1;
rebuild_selected_array();
redraw_hilights();
}
void draw_hilight_net(int on_window)
{
int save_draw;

6
src/scheduler.c
View File

@ -764,7 +764,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
no_of_pins= (xctx->inst[i].ptr+ xctx->sym)->rects[PINLAYER];
for(p=0;p<no_of_pins;p++) {
if(!strcmp( get_tok_value((xctx->inst[i].ptr+ xctx->sym)->rect[PINLAYER][p].prop_ptr,"name",0), argv[3])) {
str_ptr = net_name(i,p,&mult, 0);
str_ptr = net_name(i,p,&mult, 0, 1);
break;
}
} /* /20171029 */
@ -1418,9 +1418,9 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
Tcl_AppendResult(interp, list_tokens(argv[2], atoi(argv[3])), NULL);
}
else if(!strcmp(argv[1],"select_connected_nets"))
else if(!strcmp(argv[1],"select_hilight_net"))
{
select_connected_nets();
select_hilight_net();
}
else if(!strcmp(argv[1],"unhilight"))
{

34
src/select.c
View File

@ -800,40 +800,6 @@ void select_arc(int c, int i, unsigned short select_mode, int fast)
need_rebuild_selected_array=1;
}
void select_connected_nets(void)
{
int i, n;
char *str = NULL;
prepare_netlist_structs(0);
rebuild_selected_array();
for(i=0;i<lastselected;i++)
{
n = selectedgroup[i].n;
switch(selectedgroup[i].type)
{
case WIRE:
if(xctx->wire[n].sel==SELECTED) {
my_strdup(62, &str ,get_tok_value(xctx->wire[n].prop_ptr, "lab",0));
if(str && str[0]) {
search("lab", str,1, 1, NOW);
}
}
break;
case ELEMENT:
if(xctx->inst[n].sel==SELECTED) {
my_strdup(63, &str, get_tok_value(xctx->inst[n].prop_ptr, "lab",0));
if(str && str[0]) {
search("lab", str,1, 1, NOW);
}
}
break;
default:
break;
}
}
my_free(943, &str);
}
void select_polygon(int c, int i, unsigned short select_mode, int fast )
{
char str[1024]; /* overflow safe */

48
src/token.c
View File

@ -1092,7 +1092,7 @@ void print_vhdl_element(FILE *fd, int inst)
for(i=0;i<no_of_pins;i++)
{
if(strcmp(get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"vhdl_ignore",0), "true")) {
if( (str_ptr = net_name(inst,i, &mult, 0)) )
if( (str_ptr = net_name(inst,i, &mult, 0, 1)) )
{
if(tmp) fprintf(fd, " ,\n");
fprintf(fd, " %s => %s",
@ -1568,7 +1568,7 @@ void print_spice_element(FILE *fd, int inst)
{
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr;
if(strcmp(get_tok_value(prop, "spice_ignore", 0), "true")) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
tmp = strlen(str_ptr) +100 ; /* always make room for some extra chars
* so 1-char writes to result do not need reallocs */
@ -1582,7 +1582,7 @@ void print_spice_element(FILE *fd, int inst)
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr;
if (!strcmp( get_tok_value(prop,"name",0), token+2)) {
if(strcmp(get_tok_value(prop,"spice_ignore",0), "true")) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
tmp = strlen(str_ptr) +100 ; /* always make room for some extra chars
* so 1-char writes to result do not need reallocs */
@ -1601,7 +1601,7 @@ void print_spice_element(FILE *fd, int inst)
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][pin_number].prop_ptr;
si = get_tok_value(prop, "spice_ignore",0);
if(strcmp(si, "true")) {
str_ptr = net_name(inst,pin_number, &mult, 0);
str_ptr = net_name(inst,pin_number, &mult, 0, 1);
tmp = strlen(str_ptr) +100 ; /* always make room for some extra chars
* so 1-char writes to result do not need reallocs */
@ -1736,7 +1736,7 @@ void print_tedax_element(FILE *fd, int inst)
get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"pinnumber",0));
}
if(!get_tok_size) my_strdup(501, &pinnumber, "--UNDEF--");
tmp = net_name(inst,i, &mult, 0);
tmp = net_name(inst,i, &mult, 0, 1);
if(tmp && strcmp(tmp, "__UNCONNECTED_PIN__")) {
fprintf(fd, "conn %s %s %s %s %d\n",
name,
@ -1838,7 +1838,7 @@ void print_tedax_element(FILE *fd, int inst)
{ /* and node number: m1 n1 m2 n2 .... */
for(i=0;i<no_of_pins;i++)
{
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
/* fprintf(errfp, "inst: %s --> %s\n", name, str_ptr); */
fprintf(fd, "?%d %s ", mult, str_ptr);
}
@ -1850,7 +1850,7 @@ void print_tedax_element(FILE *fd, int inst)
token+2
)
) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
fprintf(fd, "%s", str_ptr);
break;
}
@ -1898,7 +1898,7 @@ void print_tedax_element(FILE *fd, int inst)
/* @#n --> return net name attached to pin of index 'n' */
pin_number = atoi(token+2);
if(pin_number < no_of_pins) {
str_ptr = net_name(inst,pin_number, &mult, 0);
str_ptr = net_name(inst,pin_number, &mult, 0, 1);
fprintf(fd, "%s", str_ptr);
}
}
@ -2069,7 +2069,7 @@ void print_verilog_element(FILE *fd, int inst)
{
xSymbol *ptr = xctx->inst[inst].ptr+ xctx->sym;
if(strcmp(get_tok_value(ptr->rect[PINLAYER][i].prop_ptr,"verilog_ignore",0), "true")) {
if( (str_ptr = net_name(inst,i, &mult, 0)) )
if( (str_ptr = net_name(inst,i, &mult, 0, 1)) )
{
if(tmp) fprintf(fd,"\n");
fprintf(fd, " ?%d %s %s ", mult,
@ -2089,7 +2089,7 @@ void print_verilog_element(FILE *fd, int inst)
}
const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net)
const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net, int erc)
{
int tmp;
char errstr[2048];
@ -2129,12 +2129,14 @@ const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net)
{
*mult=1;
my_snprintf(errstr, S(errstr), "Warning: unconnected pin, Inst idx: %d, Pin idx: %d Inst:%s\n",
i, j, xctx->inst[i].instname ) ;
statusmsg(errstr,2);
if(!netlist_count) {
xctx->inst[i].flags |=4;
hilight_nets=1;
if(erc) {
my_snprintf(errstr, S(errstr), "Warning: unconnected pin, Inst idx: %d, Pin idx: %d Inst:%s\n",
i, j, xctx->inst[i].instname ) ;
statusmsg(errstr,2);
if(!netlist_count) {
xctx->inst[i].flags |=4;
hilight_nets=1;
}
}
return unconn;
}
@ -2252,7 +2254,7 @@ void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 20071217 *
{
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr;
if(strcmp(get_tok_value(prop,"vhdl_ignore",0), "true")) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
fprintf(fd, "----pin(%s) ", str_ptr);
}
}
@ -2262,7 +2264,7 @@ void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 20071217 *
xSymbol *ptr = xctx->inst[inst].ptr+ xctx->sym;
if(!strcmp( get_tok_value(ptr->rect[PINLAYER][i].prop_ptr,"name",0), token+2)) {
if(strcmp(get_tok_value(ptr->rect[PINLAYER][i].prop_ptr,"vhdl_ignore",0), "true")) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
fprintf(fd, "----pin(%s) ", str_ptr);
}
break;
@ -2275,7 +2277,7 @@ void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 20071217 *
if(pin_number < no_of_pins) {
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][pin_number].prop_ptr;
if(strcmp(get_tok_value(prop,"vhdl_ignore",0), "true")) {
str_ptr = net_name(inst,pin_number, &mult, 0);
str_ptr = net_name(inst,pin_number, &mult, 0, 1);
fprintf(fd, "----pin(%s) ", str_ptr);
}
}
@ -2425,7 +2427,7 @@ void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level primiti
{
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr;
if(strcmp(get_tok_value(prop, "verilog_ignore",0), "true")) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
fprintf(fd, "----pin(%s) ", str_ptr);
}
}
@ -2435,7 +2437,7 @@ void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level primiti
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr;
if(!strcmp( get_tok_value(prop,"name",0), token+2)) {
if(strcmp(get_tok_value(prop, "verilog_ignore",0), "true")) {
str_ptr = net_name(inst,i, &mult, 0);
str_ptr = net_name(inst,i, &mult, 0, 1);
fprintf(fd, "----pin(%s) ", str_ptr);
}
break;
@ -2450,7 +2452,7 @@ void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level primiti
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][pin_number].prop_ptr;
vi = get_tok_value(prop,"verilog_ignore",0);
if(strcmp(vi, "true")) {
str_ptr = net_name(inst,pin_number, &mult, 0);
str_ptr = net_name(inst,pin_number, &mult, 0, 1);
fprintf(fd, "----pin(%s) ", str_ptr);
}
}
@ -2632,7 +2634,7 @@ const char *translate(int inst, const char* s)
char *prop = (xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr;
if (!strcmp( get_tok_value(prop,"name",0), token+2)) {
if(strcmp(get_tok_value(prop,"spice_ignore",0), "true")) {
const char *str_ptr = net_name(inst,i, &mult, 0);
const char *str_ptr = net_name(inst,i, &mult, 0, 0);
tmp = strlen(str_ptr) +100 ;
STR_ALLOC(&result, tmp + result_pos, &size);
result_pos += my_snprintf(result + result_pos, tmp, "%s", str_ptr);

4
src/xschem.h
View File

@ -1002,7 +1002,7 @@ extern char *escape_chars(char *dest, const char *source, int size);
extern void set_inst_prop(int i);
extern void unselect_wire(int i);
extern void select_connected_nets(void);
extern void select_hilight_net(void);
extern void check_wire_storage(void);
extern void check_text_storage(void);
extern void check_inst_storage(void);
@ -1023,7 +1023,7 @@ extern void select_box(int c, int i, unsigned short select_mode, int fast);
extern void select_arc(int c, int i, unsigned short select_mode, int fast);
extern void select_line(int c, int i, unsigned short select_mode, int fast);
extern void select_polygon(int c, int i, unsigned short select_mode, int fast );
extern const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net);
extern const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net, int erc);
extern int record_global_node(int what, FILE *fp, char *node);
extern int count_labels(char *s);
extern int get_unnamed_node(int what, int mult, int node);

2
src/xschem.tcl
View File

@ -3840,7 +3840,7 @@ font configure Underline-Font -underline true -size 24
-accelerator {Ctrl+#}
.menubar.hilight.menu add command -label {Highlight selected net/pins} -command "xschem hilight" -accelerator K
.menubar.hilight.menu add command -label {Send selected net/pins to GAW} -command "xschem send_to_gaw" -accelerator Alt+G
.menubar.hilight.menu add command -label {Select connected nets / pins} -command "xschem select_connected_nets" \
.menubar.hilight.menu add command -label {Select hilight nets / pins} -command "xschem select_hilight_net" \
-accelerator Alt+K
.menubar.hilight.menu add command -label {Un-highlight all net/pins} \
-command "xschem clear_hilights" -accelerator Shift+K