fix usage of "xschem_libs", list of libraries/schematics NOT to netlist / export
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parent
5880e23f94
commit
f251918a0e
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@ -367,7 +367,7 @@ int check_lib(const char *s)
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for(i=0;i<range;i++){
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my_snprintf(str, S(str), "lindex $xschem_libs %d",i);
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tcleval(str);
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dbg(1, "check_lib(): xschem_libs=%s\n", tclresult());
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dbg(1, "check_lib(): s=%s, xschem_libs=%s\n", s, tclresult());
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if( strstr(s,tclresult())) found=1;
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}
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if(found) return 0;
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@ -35,6 +35,7 @@ void hier_psprint(void) /* netlister driver */
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char *subckt_name;
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int spice_stop;
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char filename[PATH_MAX];
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char *abs_path = NULL;
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const char *str_tmp;
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if(!ps_draw(1)) return; /* prolog */
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@ -47,7 +48,7 @@ void hier_psprint(void) /* netlister driver */
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free_hash(subckt_table);
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zoom_full(0, 0, 1, 0.97);
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ps_draw(2); /* page */
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dbg(0,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) );
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dbg(1,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) );
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unselect_all();
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remove_symbols(); /* 20161205 ensure all unused symbols purged before descending hierarchy */
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load_schematic(1, xctx->sch[xctx->currsch], 0);
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@ -61,7 +62,8 @@ void hier_psprint(void) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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my_strdup(1230, &abs_path, abs_sym_path(xctx->sym[i].name, ""));
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path))
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(1228, &subckt_name, get_cell(xctx->sym[i].name, 0));
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@ -82,9 +84,10 @@ void hier_psprint(void) /* netlister driver */
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zoom_full(0, 0, 1, 0.97);
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ps_draw(2); /* page */
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dbg(0,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) );
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dbg(1,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) );
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}
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}
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my_free(1231, &abs_path);
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}
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free_hash(subckt_table);
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my_free(1229, &subckt_name);
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@ -112,6 +115,7 @@ void global_spice_netlist(int global) /* netlister driver */
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char tcl_cmd_netlist[PATH_MAX + 100]; /* 20081211 overflow safe 20161122 */
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char cellname[PATH_MAX]; /* 20081211 overflow safe 20161122 */
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char *subckt_name;
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char *abs_path = NULL;
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xctx->netlist_unconn_cnt=0; /* unique count of unconnected pins while netlisting */
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statusmsg("",2); /* clear infowindow */
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@ -249,7 +253,8 @@ void global_spice_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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my_strdup(1232, &abs_path, abs_sym_path(xctx->sym[i].name, ""));
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path))
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(391, &subckt_name, get_cell(xctx->sym[i].name, 0));
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@ -265,6 +270,7 @@ void global_spice_netlist(int global) /* netlister driver */
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spice_block_netlist(fd, i);
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}
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}
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my_free(1233, &abs_path);
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}
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free_hash(subckt_table);
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my_free(944, &subckt_name);
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@ -31,6 +31,7 @@ void global_tedax_netlist(int global) /* netlister driver */
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char netl_filename[PATH_MAX]; /* overflow safe 20161122 */
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char tcl_cmd_netlist[PATH_MAX + 100]; /* 20081211 overflow safe 20161122 */
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char cellname[PATH_MAX]; /* 20081211 overflow safe 20161122 */
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char *abs_path = NULL;
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if(xctx->modified) {
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save_ok = save_schematic(xctx->sch[xctx->currsch]);
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@ -102,10 +103,12 @@ void global_tedax_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"tedax_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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my_strdup(1236, &abs_path, abs_sym_path(xctx->sym[i].name, ""));
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path))
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{
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tedax_block_netlist(fd, i);
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}
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my_free(1237, &abs_path);
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}
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/*clear_drawing(); */
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my_strncpy(xctx->sch[xctx->currsch] , "", S(xctx->sch[xctx->currsch]));
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@ -38,6 +38,7 @@ void global_verilog_netlist(int global) /* netlister driver */
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char *type=NULL;
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struct stat buf;
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char *subckt_name;
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char *abs_path = NULL;
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xctx->netlist_unconn_cnt=0; /* unique count of unconnected pins while netlisting */
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statusmsg("",2); /* clear infowindow */
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@ -293,7 +294,8 @@ void global_verilog_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"verilog_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, ""))) {
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my_strdup(1234, &abs_path, abs_sym_path(xctx->sym[i].name, ""));
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path)) {
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(328, &subckt_name, get_cell(xctx->sym[i].name, 0));
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if (str_hash_lookup(subckt_table, subckt_name, "", XLOOKUP)==NULL)
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@ -308,6 +310,7 @@ void global_verilog_netlist(int global) /* netlister driver */
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verilog_block_netlist(fd, i);
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}
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}
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my_free(1235, &abs_path);
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}
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free_hash(subckt_table);
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my_free(1073, &subckt_name);
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@ -38,6 +38,7 @@ void global_vhdl_netlist(int global) /* netlister driver */
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char *type=NULL;
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struct stat buf;
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char *subckt_name;
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char *abs_path = NULL;
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xctx->netlist_unconn_cnt=0; /* unique count of unconnected pins while netlisting */
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statusmsg("",2); /* clear infowindow */
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@ -249,10 +250,11 @@ void global_vhdl_netlist(int global) /* netlister driver */
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if( strcmp(get_tok_value(xctx->sym[j].prop_ptr,"vhdl_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[j].type || (strcmp(xctx->sym[j].type,"primitive")!=0 &&
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strcmp(xctx->sym[j].type,"subcircuit")!=0)) continue;
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my_strdup(1240, &abs_path, abs_sym_path(xctx->sym[j].name, ""));
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if((
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strcmp(xctx->sym[j].type,"subcircuit")==0 ||
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strcmp(xctx->sym[j].type,"primitive")==0
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) && check_lib(abs_sym_path(xctx->sym[j].name, ""))
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) && check_lib(abs_path)
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)
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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@ -288,6 +290,7 @@ void global_vhdl_netlist(int global) /* netlister driver */
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fprintf(fd, "end component ;\n\n");
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}
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}
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my_free(1241, &abs_path);
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}
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free_hash(subckt_table);
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my_free(1086, &subckt_name);
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@ -345,7 +348,8 @@ void global_vhdl_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"vhdl_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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my_strdup(1242, &abs_path, abs_sym_path(xctx->sym[j].name, ""));
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path))
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(327, &subckt_name, get_cell(xctx->sym[i].name, 0));
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@ -361,6 +365,7 @@ void global_vhdl_netlist(int global) /* netlister driver */
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vhdl_block_netlist(fd, i);
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}
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}
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my_free(1243, &abs_path);
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}
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free_hash(subckt_table);
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my_free(1087, &subckt_name);
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@ -413,6 +418,7 @@ void vhdl_block_netlist(FILE *fd, int i)
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char tcl_cmd_netlist[PATH_MAX + 100];
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char cellname[PATH_MAX];
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const char *str_tmp;
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char *abs_path = NULL;
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if(!strcmp( get_tok_value(xctx->sym[i].prop_ptr,"vhdl_stop",0),"true") )
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vhdl_stop=1;
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@ -525,8 +531,9 @@ void vhdl_block_netlist(FILE *fd, int i)
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if(!xctx->sym[j].type || (strcmp(xctx->sym[j].type,"primitive")!=0 &&
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strcmp(xctx->sym[j].type,"subcircuit")!=0))
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continue;
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my_strdup(1238, &abs_path, abs_sym_path(xctx->sym[i].name, ""));
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if(( strcmp(xctx->sym[j].type,"subcircuit")==0 || strcmp(xctx->sym[j].type,"primitive")==0) &&
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check_lib(abs_sym_path(xctx->sym[j].name, ""))
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check_lib(abs_path)
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) {
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/* only print component declaration if used in current subcircuit */
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@ -573,6 +580,7 @@ void vhdl_block_netlist(FILE *fd, int i)
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if(tmp) fprintf(fd, "\n);\n");
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fprintf(fd, "end component ;\n\n");
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}
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my_free(1239, &abs_path);
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}
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dbg(1, "vhdl_block_netlist(): netlisting %s\n", skip_dir( xctx->sch[xctx->currsch]));
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vhdl_netlist(fd, vhdl_stop);
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