fix make_sym.awk: if an existing symbol is present with empty (or white space) attributes do not preserve these, force new default attributes (name=... template=... format=...)
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0129046499
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@ -52,10 +52,11 @@ function beginfile(f)
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print "**** symbol-izing: " sym " ****"
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print "**** symbol-izing: " sym " ****"
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template="" ; start=0
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template="" ; start=0
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while((getline symline <sym) >0) {
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while((getline symline <sym) >0) {
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if(symline ~ /^[GK] \{/ ) start=1
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if(symline ~ /^[K] \{/ ) start=1
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if(start) template=template symline "\n"
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if(start) template=template symline "\n"
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if(symline ~ /\} *$/) start=0
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if(symline ~ /\} *$/) start=0
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}
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}
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print "---> " template
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close(sym)
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close(sym)
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@ -69,7 +70,7 @@ function beginfile(f)
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lab_voffset=4
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lab_voffset=4
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ip=op=n_pin=0
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ip=op=n_pin=0
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print "v {xschem version=3.4.5 file_version=1.2}" > sym
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print "v {xschem version=3.4.5 file_version=1.2}" > sym
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if(template=="") {
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if(template !~/^{[ \t\n]*$/) {
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printf "%s", "K {type=subcircuit\nformat=\"@name @pinlist @symname\"\n" >sym
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printf "%s", "K {type=subcircuit\nformat=\"@name @pinlist @symname\"\n" >sym
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printf "%s\n", "template=\"name=x1\"" >sym
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printf "%s\n", "template=\"name=x1\"" >sym
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printf "%s", "}\n" >sym
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printf "%s", "}\n" >sym
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@ -1,57 +1,11 @@
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v {xschem version=3.4.4 file_version=1.2
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v {xschem version=3.4.5 file_version=1.2}
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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* Copyright (C) 1998-2023 Stefan Frederik Schippers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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G {}
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K {type=subcircuit
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K {type=subcircuit
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format="@name @pinlist @symname"
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format="@name @pinlist @symname"
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template="name=x1"
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template="name=x1"
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net_name=true
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}
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}
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V {}
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S {}
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E {}
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L 4 -130 -50 130 -50 {}
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L 4 -130 50 130 50 {}
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L 4 -130 -50 -130 50 {}
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L 4 130 -50 130 50 {}
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L 4 -150 -40 -130 -40 {}
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L 4 -150 -20 -130 -20 {}
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L 4 -150 0 -130 0 {}
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L 4 130 -40 150 -40 {}
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L 4 -150 20 -130 20 {}
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L 4 -150 40 -130 40 {}
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B 5 -152.5 -42.5 -147.5 -37.5 {name=MINUS dir=in }
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B 5 -152.5 -22.5 -147.5 -17.5 {name=PLUS dir=in }
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B 5 -152.5 -2.5 -147.5 2.5 {name=VSS dir=in }
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B 5 147.5 -42.5 152.5 -37.5 {name=OUT dir=out }
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B 5 -152.5 17.5 -147.5 22.5 {name=VPP dir=in }
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B 5 -152.5 37.5 -147.5 42.5 {name=VNN dir=in }
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T {@symname} -85.5 -6 0 0 0.3 0.3 {}
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T {@symname} -85.5 -6 0 0 0.3 0.3 {}
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T {@name} 135 -62 0 0 0.2 0.2 {}
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T {@name} 135 -22 0 0 0.2 0.2 {}
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T {MINUS} -125 -44 0 0 0.2 0.2 {}
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L 4 -130 -10 130 -10 {}
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T {PLUS} -125 -24 0 0 0.2 0.2 {}
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L 4 -130 10 130 10 {}
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T {VSS} -125 -4 0 0 0.2 0.2 {}
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L 4 -130 -10 -130 10 {}
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T {OUT} 125 -44 0 1 0.2 0.2 {}
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L 4 130 -10 130 10 {}
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T {VPP} -125 16 0 0 0.2 0.2 {}
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T {VNN} -125 36 0 0 0.2 0.2 {}
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T {( @#0:resolved_net )} -90 -45 0 0 0.2 0.2 {layer=15}
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T {( @#1:resolved_net )} -90 -25 0 0 0.2 0.2 {layer=15}
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T {( @#3:resolved_net )} 120 -25 0 1 0.2 0.2 {layer=15}
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