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more schematic netlist tests in xschemtest.tcl

This commit is contained in:
stefan schippers 2023-11-13 23:46:13 +01:00
parent f4df48813f
commit e2dc93c8b0
3 changed files with 6 additions and 3 deletions
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3
tests/xschemtest.tcl
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@ -193,6 +193,9 @@ proc netlist_test {} {
rom8k.sch spice 1947979332
greycnt.sch verilog 2899796185
autozero_comp.sch spice 751826850
test_generators.sch spice 49312823
inst_sch_select.sch spice 801962545
test_bus_tap.sch spice 181420586
loading.sch vhdl 2975204502
mos_power_ampli.sch spice 1986885043
hierarchical_tedax.sch tedax 998070173

2
xschem_library/inst_sch_select/inst_sch_select.sch
View File

@ -42,7 +42,7 @@ out3
out4
out5
out6"
color="9 10 11 12 13 14"
color="7 8 9 10 11 12"
dataset=-1
unitx=1
logx=0

4
xschem_library/xschem_simulator/simulate_ff.sch
View File

@ -1,4 +1,4 @@
v {xschem version=3.4.4 file_version=1.2
v {xschem version=3.4.5 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@ -355,7 +355,7 @@ comment="
"
tclcommand="
set count 0
set duration 300
set duration 80
xschem select instance p8 ;# CLEAR_
xschem select instance p9 ;# CLK
xschem logic_set 0 ;# reset pulse (active low)