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fix repeated character in RE, fix changed syntax in verilog example

This commit is contained in:
Stefan Frederik 2020-11-28 20:08:40 +01:00
parent 9a03923b4e
commit d95eb0f871
2 changed files with 2 additions and 2 deletions
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2
src/parselabel.l
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@ -130,7 +130,7 @@ const char *expandlabel(const char *s, int *m)
%x rest %x rest
ID [-#+_\\/=a-zA-Z0-9]*[-#@+/_\\/=a-zA-Z]+[-#@+_\\/=a-zA-Z0-9]* ID [-#+_\\/=a-zA-Z0-9]*[-#@+_\\/=a-zA-Z]+[-#@+_\\/=a-zA-Z0-9]*
ID_NUM [-#+_\\/=a-zA-Z0-9]+ ID_NUM [-#+_\\/=a-zA-Z0-9]+
ID_EXT ([-~#+/=_a-zA-Z][-~#@\\/:.=_+a-zA-Z0-9]*)|([-~#+/.=_a-zA-Z][-~#@\\/:=_+a-zA-Z0-9]*) ID_EXT ([-~#+/=_a-zA-Z][-~#@\\/:.=_+a-zA-Z0-9]*)|([-~#+/.=_a-zA-Z][-~#@\\/:=_+a-zA-Z0-9]*)

2
xschem_library/examples/greycnt.sch
View File

@ -12,7 +12,7 @@ end process;}
K {} K {}
V {initial begin V {initial begin
$dumpfile("dumpfile.vcd"); $dumpfile("dumpfile.vcd");
$dumpvars; $dumpvars(0, greycnt);
A=0; A=0;
end end