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add devices/filesource.sym

This commit is contained in:
stefan schippers 2025-08-31 19:12:11 +02:00
parent 90766486d4
commit d455e29913
1 changed files with 45 additions and 0 deletions
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xschem_library/devices/filesource.sym Normal file
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@ -0,0 +1,45 @@
v {xschem version=3.4.8RC file_version=1.3
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
G {}
K {type=vsource
format="@name \\\\%v([ @@p ]) @model
.model @model filesource file=\\"@file\\\\\\" amploffset=[ @amploffset ] amplscale=[ @amplscale ]"
template="name=A1 file=filesource.txt model=filesrc amploffset=0 amplscale=1"
*spectre_format="@name ( @pinlist ) vsource @value"
*spectre_device_model="model vsource vsource"}
V {}
S {}
F {}
E {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
L 4 -0 -30 -0 30 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
A 4 0 0 15 270 360 {}
T {@name} 20 -18.75 0 0 0.2 0.2 {}
T {@model
@file} 20 -3.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}