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added examples/tb_test_evaluated_param.sch

This commit is contained in:
stefan schippers 2025-10-10 23:50:17 +02:00
parent 6ac434f63f
commit d144f6e478
5 changed files with 162 additions and 23 deletions
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47
xschem_library/examples/0_examples_top.sch
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@ -67,12 +67,12 @@ A 7 884.1666666666666 -210 39.58991173406564 210.3432488842396 198.9246444160511
P 1 10 880 -480 870 -540 950 -520 910 -500 940 -470 920 -470 910 -450 890 -490 880 -470 880 -480 {dash=3}
P 4 6 830 -460 830 -550 820 -500 780 -560 770 -520 810 -480 {bezier=1}
P 15 11 870 -510 880 -550 900 -520 910 -540 920 -510 940 -520 920 -480 890 -490 860 -470 840 -520 870 -510 {fill=true}
T {Welcome to XSCHEM!} 100 -1150 0 0 1 1 {layer=5}
T {Welcome to XSCHEM!} 90 -1180 0 0 1 1 {layer=5}
T {This is a test schematic window
On the left you see some sample circuits. You may descend into any of these by selecting one with a left mouse button click and
pressing the 'e' key, or by menu 'Edit -> Push Schematic'. You can return here after descending into a schematic by hitting
'<Ctrl>-e' or by menu 'Edit -> Pop'.} 60 -1070 0 0 0.4 0.4 {}
'<Ctrl>-e' or by menu 'Edit -> Pop'.} 60 -1100 0 0 0.4 0.4 {}
T {Lines} 960 -680 0 0 0.6 0.6 {layer=4}
T {Rectangles /
Ellipses} 960 -640 0 0 0.6 0.6 {layer=4}
@ -112,16 +112,16 @@ N 410 -350 410 -320 {lab=BUS[2]}
N 460 -400 460 -320 {lab=BUS[2:1]}
N 860 -450 860 -380 {lab=#net2}
N 820 -410 910 -410 {lab=#net1}
C {poweramp.sym} 160 -140 0 0 {name=x1
C {poweramp.sym} 160 -180 0 0 {name=x1
tclcommand="xschem descend"}
C {tesla.sym} 160 -700 0 0 {name=x2}
C {test_ne555.sym} 160 -660 0 0 {name=x3}
C {test_lm324.sym} 160 -620 0 0 {name=x4}
C {osc.sym} 160 -740 0 0 {name=x5}
C {tesla.sym} 160 -740 0 0 {name=x2}
C {test_ne555.sym} 160 -700 0 0 {name=x3}
C {test_lm324.sym} 160 -660 0 0 {name=x4}
C {osc.sym} 160 -780 0 0 {name=x5}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {cmos_example.sym} 160 -780 0 0 {name=x6}
C {greycnt.sym} 160 -820 0 0 {name=x8}
C {loading.sym} 160 -860 0 0 {name=x9}
C {cmos_example.sym} 160 -820 0 0 {name=x6}
C {greycnt.sym} 160 -860 0 0 {name=x8}
C {loading.sym} 160 -900 0 0 {name=x9}
C {inv_bsource.sym} 880 -320 0 0 {name=B1 TABLE="1.4 3.0 1.6 0.0"}
C {launcher.sym} 460 -140 0 0 {name=h1
descr="XSCHEM ON REPO.HU"
@ -137,17 +137,17 @@ url="$\{XSCHEM_SHAREDIR\}/../doc/xschem/index.html"
}
C {rlc.sym} 160 -900 0 0 {name=x0}
C {rlc.sym} 160 -940 0 0 {name=x0}
C {lab_pin.sym} 640 -310 0 1 {name=l2 sig_type=std_logic lab=BUS[4:0]}
C {bus_connect.sym} 500 -310 0 0 {name=l3 lab=BUS[1]}
C {bus_connect_nolab.sym} 400 -310 0 0 {name=r1}
C {lab_pin.sym} 410 -350 3 1 {name=l4 sig_type=std_logic lab=BUS[2]}
C {LCC_instances.sym} 160 -580 0 0 {name=x7}
C {test_backannotated_subckt.sym} 160 -540 0 0 {name=x10}
C {plot_manipulation.sym} 160 -500 0 0 {name=x11}
C {logic_test.sym} 160 -460 0 0 {name=x12}
C {simulate_ff.sym} 160 -420 0 0 {name=x13}
C {test_mos_verilog.sym} 160 -380 0 0 {name=x14}
C {LCC_instances.sym} 160 -620 0 0 {name=x7}
C {test_backannotated_subckt.sym} 160 -580 0 0 {name=x10}
C {plot_manipulation.sym} 160 -540 0 0 {name=x11}
C {logic_test.sym} 160 -500 0 0 {name=x12}
C {simulate_ff.sym} 160 -460 0 0 {name=x13}
C {test_mos_verilog.sym} 160 -420 0 0 {name=x14}
C {launcher.sym} 1265 -225 0 0 {name=h5
descr=" Ctrl-Left-Click to load/
unload waveforms"
@ -1480,15 +1480,15 @@ xwtAgA9ve8fHC0Dod8blIpQLQJBdgRgxavQ/AAAAgEslwD6d7SiMdxwqP41maeirFRxABH/Rb+tVM0DO
cwtAyKwqggMC8z8AAABAXz/APixDHOviNio/cIyWTt0GHEAHmaX3NW0zQHJvU5F/bTNA3V5CW3kqoL85tJeeXUIJQIB/waNeQglAcFfF8JIdC0DY7tjwBPjxPwAAALCc
UsA+"
}
C {test_ac.sym} 160 -340 0 0 {name=x15}
C {rom8k.sym} 160 -180 0 0 {name=x17}
C {test_doublepin.sym} 160 -300 0 0 {name=x19}
C {classD_amp.sym} 160 -220 0 0 {name=x20}
C {test_ac.sym} 160 -380 0 0 {name=x15}
C {rom8k.sym} 160 -220 0 0 {name=x17}
C {test_doublepin.sym} 160 -340 0 0 {name=x19}
C {classD_amp.sym} 160 -260 0 0 {name=x20}
C {delta_sigma.sym} 480 -900 0 0 {name=x21}
C {solar_panel.sym} 480 -860 0 0 {name=xsolar}
C {test_extracted_netlist.sym} 160 -260 0 0 {name=x23
C {test_extracted_netlist.sym} 160 -300 0 0 {name=x23
tclcommand="xschem descend"}
C {poweramp_lcc.sym} 160 -100 0 0 {name=x16
C {poweramp_lcc.sym} 160 -140 0 0 {name=x16
tclcommand="xschem descend"}
C {test_symbolgen.sym} 480 -820 0 0 {name=x18}
C {inst_sch_select.sym} 480 -740 0 0 {name=x24}
@ -1505,3 +1505,4 @@ C {test_nyquist.sym} 480 -460 0 0 {name=x32}
C {tb_diff_amp.sym} 890 -900 0 0 {name=x33}
C {tb_sar_adc.sym} 1360 -870 0 0 {name=x34}
C {tb_counter_wrapper.sym} 1360 -900 0 0 {name=x35}
C {tb_test_evaluated_param.sym} 480 -940 0 0 {name=x36}

74
xschem_library/examples/tb_test_evaluated_param.sch Normal file
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@ -0,0 +1,74 @@
v {xschem version=3.4.8RC file_version=1.3}
G {}
K {}
V {}
S {}
F {}
E {}
B 2 540 -740 1200 -340 {flags=graph
y1=0
y2=3.1
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=1
x1=0
x2=5e-08
divx=5
subdivx=1
xlabmag=1.0
ylabmag=1.0
node="a
z1
z2"
color="7 1 8"
dataset=-1
unitx=1
logx=0
logy=0
}
T {Test of *resolved* parameter passing
down to subcircuits.
Xschem does all parameter expression
evaluation. Subcircuits contains only
numeric literals. See the 'DEL' parameter.
every instance needs a unique
schematic=... attribute.} 10 -740 0 0 0.4 0.4 {layer=1}
T {Value of voltage
source is set with
the TCL 'VCC' variable} 480 -140 0 1 0.3 0.3 {}
T {Note also the VCC parameter is defined
as a spice .param and also as a TCL variable.
This is another method to pass parameters
to various parts of the circuit hierarchy.} 10 -500 0 0 0.4 0.4 {layer=8}
N 520 -150 600 -150 {lab=A}
N 520 -150 520 -140 {lab=A}
N 900 -150 950 -150 {lab=Z2}
N 900 -250 950 -250 {lab=Z1}
N 520 -250 600 -250 {lab=A}
N 520 -250 520 -150 {lab=A}
C {code_shown.sym} 0 -340 0 0 {name=COMMANDS only_toplevel=false value="tcleval(
.options savecurrents
** following .param is set with a TCL command
.param VCC=[set VCC 3]
.control
save all
tran 10p 50n
write tb_test_evaluated_param.raw
.endc
)"}
C {test_evaluated_param.sym} 750 -150 0 0 {name=x1 DEL=5
schematic=test_evaluated_param2.sch}
C {lab_pin.sym} 950 -150 0 1 {name=p1 lab=Z2}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {vsource.sym} 520 -110 0 0 {name=V1 value="tcleval(pwl 0 0 10n 0 11n $VCC)" savecurrent=false}
C {gnd.sym} 520 -80 0 0 {name=l2 lab=GND}
C {lab_pin.sym} 520 -150 0 0 {name=p2 lab=A}
C {test_evaluated_param.sym} 750 -250 0 0 {name=x2 DEL=2
schematic=test_evaluated_param1.sch}
C {lab_pin.sym} 950 -250 0 1 {name=p3 lab=Z1}
C {launcher.sym} 960 -310 0 0 {name=h5
descr="load waves"
tclcommand="xschem raw_read $netlist_dir/tb_test_evaluated_param.raw tran"
}

8
xschem_library/examples/tb_test_evaluated_param.sym Normal file
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@ -0,0 +1,8 @@
v {xschem version=3.4.8RC file_version=1.3}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
}
T {@symname} -121.5 -6 0 0 0.3 0.3 {}
T {@name} 135 -22 0 0 0.2 0.2 {}
P 4 5 130 -10 -130 -10 -130 10 130 10 130 -10 {}

35
xschem_library/examples/test_evaluated_param.sch Normal file
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@ -0,0 +1,35 @@
v {xschem version=3.4.8RC file_version=1.3}
G {}
K {}
V {}
S {}
F {}
E {}
T {These components use the @DEL
parameter passed from parent level
by Xschem} 240 -390 0 0 0.4 0.4 {}
N 500 -230 580 -230 {lab=Z}
N 500 -230 500 -190 {lab=Z}
N 360 -230 410 -230 {lab=A}
N 470 -230 500 -230 {lab=Z}
N 500 -130 500 -110 {lab=GND}
C {res.sym} 440 -230 1 0 {name=R1
value="expr( 2500 * @DEL )"
footprint=1206
device=resistor
m=1}
C {iopin.sym} 580 -230 0 0 {name=p1 sig_type=std_logic lab=Z}
C {gnd.sym} 500 -110 0 0 {name=l1 lab=GND}
C {iopin.sym} 360 -230 0 1 {name=p2 sig_type=std_logic lab=A}
C {capa.sym} 500 -160 0 0 {name=C1
m=1
value="expr(100f * @DEL )"
footprint=1206
device="ceramic capacitor"}
C {code_shown.sym} 10 -210 0 0 {name=COMMANDS only_toplevel=0 value="
.param DEL=@DEL
** do something with DEL
"
}
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}

21
xschem_library/examples/test_evaluated_param.sym Normal file
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@ -0,0 +1,21 @@
v {xschem version=3.4.8RC file_version=1.3}
G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1 DEL=3"
extra=DEL
default_schematic=ignore}
V {}
S {}
F {}
E {}
L 7 -150 0 -130 0 {}
L 7 130 0 150 0 {}
B 5 -152.5 -2.5 -147.5 2.5 {name=A sig_type=std_logic dir=inout}
B 5 147.5 -2.5 152.5 2.5 {name=Z sig_type=std_logic dir=inout}
P 4 5 130 -10 -130 -10 -130 10 130 10 130 -10 {}
T {@symname} -93 -8.5 0 0 0.3 0.3 {}
T {@name} 135 -22 0 0 0.2 0.2 {}
T {A} -125 -4 0 0 0.2 0.2 {}
T {param: DEL=@DEL} -90 -35 0 0 0.3 0.3 {}
T {Z} 125 -4 0 1 0.2 0.2 {}