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improve xyce netlist processing hooks (save ammeter currents), cmos_example.sch can now be simulated in ngspice and xyce

This commit is contained in:
Stefan Frederik 2022-09-11 13:21:24 +02:00
parent 9e7930c8e0
commit cd083c91e8
3 changed files with 69 additions and 33 deletions
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2
src/save.c
View File

@ -526,7 +526,7 @@ int read_rawfile(const char *f)
if(fd) {
if((res = read_dataset(fd)) == 1) {
int i;
dbg(0, "Raw file data read\n");
dbg(0, "Raw file data read: %s\n", f);
my_strdup2(1394, &xctx->graph_raw_schname, xctx->sch[xctx->currsch]);
xctx->graph_allpoints = 0;
for(i = 0; i < xctx->graph_datasets; i++) {

26
src/spice.awk
View File

@ -62,16 +62,27 @@ END{
## resolve parametric instance name vector multiplicity
substitute_instance_param()
if(xyce == 1) {
for(i=0; i<lines; i++) {
$0 = line[i]
if(tolower($1) ~/^\.tran$/) analysis_type="tran"
if(tolower($1) ~/^\.dc$/) analysis_type="dc"
if(tolower($1) ~/^\.ac$/) analysis_type="ac"
}
}
for(i=0; i<lines; i++) {
$0 = line[i]
## /place to insert processing awk hooks
if(xyce == 1) {
## transform ".save" lines into ".print tran" *only* for spice_probe elements, not user code
if(tolower($0) ~/^[ \t]*\.save[ \t]+.*\?[0-9]+/) { # .save file=test1.raw format=raw v( ?1 C2 )
if(tolower($0) ~/^[ \t]*\.save[ \t]+.*\?-?[0-9]+/) { # .save file=test1.raw format=raw v( ?1 C2 )
$1 = ""
if(tolower($2) == "tran") $2 = ""
$0 = ".print tran " $0
if(tolower($2) ~ /^(tran|ac|dc)$/) $2 = ""
# analysis_type will be replaced with the analysis found in netlist (.tran, .dc, .ac etc)
$0 = ".print analysis_type " $0
}
gsub(/ [mM] *= *1 *$/,"") # xyce does not like m=# fields (multiplicity) removing m=1 is no an issue anyway
}
@ -236,7 +247,8 @@ function process( i,j, iprefix, saveinstr, savetype, saveanalysis)
}
## .save tran v(?1 GB ) v(?1 SB )
if(tolower($1) ~ /^\.(save|print)$/ && $0 ~/\?[0-9]/) {
## ? may be followed by -1 in some cases
if(tolower($1) ~ /^\.(save|print)$/ && $0 ~/\?-?[0-9]/) {
$0 = tolower($0)
saveinstr = $1
@ -244,13 +256,15 @@ function process( i,j, iprefix, saveinstr, savetype, saveanalysis)
if($0 !~/format=/ && xyce==1) {
attr=" format=raw "
}
if($2 ~/^(dc|ac|tran|op|sens|hb|es|pce|noise|homotopy)$/) saveanalysis=$2
if(analysis_type !="") saveanalysis = analysis_type
else if($2 ~/^(dc|ac|tran|op|sens|hb|es|pce|noise|homotopy)$/) saveanalysis=$2
else saveanalysis=""
$1=""
if(saveanalysis !="") $2=""
$0 = $0 # reparse line for field splitting
gsub(/ *\?-?[0-9]+ */, "")
gsub(/ *\?-?[0-9]+ */, "") # in some cases ?-1 is printed (unknow multiplicity)
gsub(/\( */, "(")
gsub(/ *\)/, ")")
for(i=1; i<=NF; i++) {

74
xschem_library/examples/cmos_example.sch
View File

@ -1,4 +1,5 @@
v {xschem version=3.1.0 file_version=1.2 }
v {xschem version=3.1.0 file_version=1.2
}
G {}
K {}
V {}
@ -111,27 +112,6 @@ m=1
value=2p
footprint=1206
device="ceramic capacitor" net_name=true}
C {code.sym} 900 -190 0 0 {name=STIMULI
only_toplevel=true
value=".temp 30
** models are generally not free: you must download
** SPICE models for active devices and put them into the below
** referenced file in netlist/simulation directory.
** http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s00/ASSIGNMENTS/TSMC035-n96g-params.txt
.include \\"models_cmos_example.txt\\"
.option savecurrents
.save all @m4[gm] @m5[gm] @m1[gm]
.control
save all
op
write cmos_example.raw
set appendwrite
* tran 1n 300n
dc vplus 2.3 2.7 0.001
write cmos_example.raw
.endc
"}
C {lab_pin.sym} 500 -430 0 0 {name=p12 lab=G net_name=true}
C {launcher.sym} 700 -60 0 0 {name=h1
descr=Backannotate
@ -145,17 +125,16 @@ C {ngspice_probe.sym} 600 -260 0 0 {name=r3}
C {ngspice_probe.sym} 770 -420 0 0 {name=r4}
C {ngspice_get_value.sym} 620 -160 0 0 {name=r5 node=i(@$\{path\}m1[id])
descr="I="}
C {code.sym} 890 -580 0 0 {name=HEADER
C {code.sym} 920 -580 0 0 {name=HEADER
place=header
only_toplevel=true
value="** ======================== **
** This is a netlist header **
** ======================== **"}
C {launcher.sym} 1095 -805 0 0 {name=h3
descr="Select arrow and
Ctrl key + Left-button-Click to load/unload waveforms"
descr="Load NGSPICE waveforms (ctrl-left-click)"
tclcommand="
xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw
xschem raw_read $netlist_dir/cmos_example_ngspice.raw
"
}
C {launcher.sym} 1300 -50 0 0 {name=h4
@ -1517,3 +1496,46 @@ qATYwoHxPgAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAPMYWeXiNho/AAAAAAAAAAAAAAAAAAAAAH/C5o3V
CM4WDmYpPwAAAAAAAAAAgcd9hMKB8T4AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAABLuyUYROgVPwAAAAAAAAAAAAAAAAAAAADEUmEID4QTQIWFPStEFwhAgE0obp729D8A
AAAAAAAEQK/MmE1vlvc/N5mZmZmZBUAAAAAAAAAAAAAAAAAAABRAAAAAAAAAAADsyD76tEgavw=="}
C {ammeter.sym} 690 -350 0 1 {name=Vmeas}
C {simulator_commands.sym} 920 -360 0 0 {name=COMMANDS
simulator=ngspice
only_toplevel=true
value=".temp 30
** models are generally not free: you must download
** SPICE models for active devices and put them into the below
** referenced file in netlist/simulation directory.
** http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s00/ASSIGNMENTS/TSMC035-n96g-params.txt
.include \\"models_cmos_example.txt\\"
.option savecurrents
.save all @m4[gm] @m5[gm] @m1[gm]
.control
save all
op
write cmos_example.raw
set appendwrite
* tran 1n 300n
dc vplus 2.3 2.7 0.001
write cmos_example_ngspice.raw
.endc
"}
C {launcher.sym} 1095 -765 0 0 {name=h6
descr="Load XYCE waveforms (ctrl-left-click)"
tclcommand="
xschem raw_read $netlist_dir/cmos_example_xyce.raw
"
}
C {simulator_commands.sym} 920 -180 0 0 {name=COMMANDS1
simulator=xyce
only_toplevel=true
value=".temp 30
** models are generally not free: you must download
** SPICE models for active devices and put them into the below
** referenced file in netlist/simulation directory.
** http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee241_s00/ASSIGNMENTS/TSMC035-n96g-params.txt
.include \\"models_cmos_example.txt\\"
.print dc format=raw file=cmos_example_xyce.raw
+ v(*) i(*)
.op
.dc vplus 2.3 2.7 0.001
"}